{} ['4516']
{'s1': 2} ['ERR:out of resource: shared memory, Required: 279136, Hardware limit: 232448. Reducing block sizes or `num_stages` may help.']
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: i32 {tt.divisibility = 16 : i32}, %arg10: f32, %arg11: f32, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<256x64xf32>
    %c63_i32 = arith.constant 63 : i32
    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x64xf32>
    %cst_1 = arith.constant dense<0.000000e+00> : tensor<64xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c1_i64 = arith.constant 1 : i64
    %c4096_i64 = arith.constant 4096 : i64
    %c4096_i32 = arith.constant 4096 : i32
    %c256_i32 = arith.constant 256 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %0 = tt.get_program_id x : i32
    %1 = tt.get_program_id y : i32
    %2 = tt.load %arg6 : !tt.ptr<i32>
    %3 = tt.addptr %arg6, %c1_i32 : !tt.ptr<i32>, i32
    %4 = tt.load %3 : !tt.ptr<i32>
    %5 = arith.subi %4, %2 : i32
    %6 = arith.muli %1, %c64_i32 : i32
    %7 = arith.cmpi slt, %6, %5 : i32
    scf.if %7 {
      %8 = arith.extsi %2 : i32 to i64
      %9 = arith.muli %8, %c4096_i64 : i64
      %10 = tt.addptr %arg0, %9 : !tt.ptr<bf16>, i64
      %11 = tt.make_tensor_descriptor %10, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %12 = tt.addptr %arg3, %9 : !tt.ptr<bf16>, i64
      %13 = tt.make_tensor_descriptor %12, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %14 = arith.muli %8, %c2048_i64 : i64
      %15 = tt.addptr %arg1, %14 : !tt.ptr<bf16>, i64
      %16 = tt.make_tensor_descriptor %15, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %17 = tt.addptr %arg2, %14 : !tt.ptr<bf16>, i64
      %18 = tt.make_tensor_descriptor %17, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %19 = arith.muli %0, %c256_i32 : i32
      %20 = tt.descriptor_load %16[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %21 = tt.descriptor_load %18[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %22 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
      %23 = tt.splat %6 : i32 -> tensor<64xi32>
      %24 = arith.addi %23, %22 : tensor<64xi32>
      %25 = arith.cmpi sge, %arg12, %c0_i32 : i32
      %26 = scf.if %25 -> (i32) {
        %42 = arith.addi %6, %c64_i32 : i32
        %43 = arith.addi %42, %arg12 : i32
        %44 = arith.minsi %5, %43 : i32
        scf.yield %44 : i32
      } else {
        scf.yield %5 : i32
      }
      %27 = arith.subi %26, %6 : i32
      %28 = arith.addi %27, %c63_i32 : i32
      %29 = arith.divsi %28, %c64_i32 : i32
      %30 = arith.muli %29, %c2_i32 : i32
      %31:2 = scf.for %arg13 = %c0_i32 to %30 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<256x64xf32>, tensor<256x64xf32>)  : i32 {
        %42 = arith.divsi %arg13, %29 : i32
        %43 = arith.muli %42, %29 : i32
        %44 = arith.subi %arg13, %43 : i32
        %45 = arith.muli %0, %c2_i32 : i32
        %46 = arith.addi %45, %42 : i32
        %47 = arith.muli %44, %c64_i32 : i32
        %48 = arith.addi %6, %47 : i32
        %49 = arith.muli %46, %c256_i32 : i32
        %50 = tt.descriptor_load %11[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %51 = tt.descriptor_load %13[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %52 = tt.splat %48 : i32 -> tensor<64xi32>
        %53 = arith.addi %52, %22 : tensor<64xi32>
        %54 = tt.splat %5 : i32 -> tensor<64xi32>
        %55 = arith.cmpi slt, %53, %54 : tensor<64xi32>
        %56 = arith.muli %46, %arg9 : i32
        %57 = tt.addptr %arg4, %56 : !tt.ptr<f32>, i32
        %58 = tt.addptr %57, %2 : !tt.ptr<f32>, i32
        %59 = tt.splat %58 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %60 = tt.addptr %59, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %61 = tt.load %60, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %62 = tt.addptr %arg5, %56 : !tt.ptr<f32>, i32
        %63 = tt.addptr %62, %2 : !tt.ptr<f32>, i32
        %64 = tt.splat %63 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %65 = tt.addptr %64, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %66 = tt.load %65, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %67 = tt.trans %20 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %68 = tt.dot %50, %67, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %69 = tt.expand_dims %53 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32>
        %70 = tt.expand_dims %24 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
        %71 = tt.broadcast %69 : tensor<64x1xi32> -> tensor<64x64xi32>
        %72 = tt.broadcast %70 : tensor<1x64xi32> -> tensor<64x64xi32>
        %73 = arith.cmpi sge, %71, %72 : tensor<64x64xi32>
        %74 = tt.splat %5 : i32 -> tensor<64x1xi32>
        %75 = arith.cmpi slt, %69, %74 : tensor<64x1xi32>
        %76 = tt.broadcast %75 : tensor<64x1xi1> -> tensor<64x64xi1>
        %77 = arith.andi %73, %76 : tensor<64x64xi1>
        %78 = scf.if %25 -> (tensor<64x64xi1>) {
          %98 = arith.subi %71, %72 : tensor<64x64xi32>
          %99 = tt.splat %arg12 : i32 -> tensor<64x64xi32>
          %100 = arith.cmpi sle, %98, %99 : tensor<64x64xi32>
          %101 = arith.andi %77, %100 : tensor<64x64xi1>
          scf.yield %101 : tensor<64x64xi1>
        } else {
          scf.yield %77 : tensor<64x64xi1>
        }
        %79 = tt.splat %arg11 : f32 -> tensor<64x64xf32>
        %80 = arith.mulf %68, %79 : tensor<64x64xf32>
        %81 = tt.expand_dims %61 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %82 = tt.broadcast %81 : tensor<64x1xf32> -> tensor<64x64xf32>
        %83 = arith.subf %80, %82 : tensor<64x64xf32>
        %84 = math.exp2 %83 : tensor<64x64xf32>
        %85 = arith.select %78, %84, %cst_0 : tensor<64x64xi1>, tensor<64x64xf32>
        %86 = tt.trans %21 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %87 = tt.dot %51, %86, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %88 = tt.expand_dims %66 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %89 = tt.broadcast %88 : tensor<64x1xf32> -> tensor<64x64xf32>
        %90 = arith.subf %87, %89 : tensor<64x64xf32>
        %91 = arith.mulf %85, %90 : tensor<64x64xf32>
        %92 = tt.trans %51 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %93 = arith.truncf %85 : tensor<64x64xf32> to tensor<64x64xbf16>
        %94 = tt.dot %92, %93, %arg15, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        %95 = tt.trans %50 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %96 = arith.truncf %91 : tensor<64x64xf32> to tensor<64x64xbf16>
        %97 = tt.dot %95, %96, %arg14, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        scf.yield %97, %94 : tensor<256x64xf32>, tensor<256x64xf32>
      } {tt.warp_specialize}
      %32 = tt.addptr %arg7, %14 : !tt.ptr<bf16>, i64
      %33 = tt.make_tensor_descriptor %32, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %34 = tt.addptr %arg8, %14 : !tt.ptr<bf16>, i64
      %35 = tt.make_tensor_descriptor %34, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %36 = tt.splat %arg10 : f32 -> tensor<256x64xf32>
      %37 = arith.mulf %31#0, %36 : tensor<256x64xf32>
      %38 = arith.truncf %37 : tensor<256x64xf32> to tensor<256x64xbf16>
      %39 = tt.trans %38 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %33[%6, %19], %39 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
      %40 = arith.truncf %31#1 : tensor<256x64xf32> to tensor<256x64xbf16>
      %41 = tt.trans %40 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %35[%6, %19], %41 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
    }
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=4 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=2}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=2}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=2}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/dev/v2.py:24:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/dev/v2.py:24:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
{'ws1': True, 's1': 2} ['ERR:PassManager::run failed']
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: i32 {tt.divisibility = 16 : i32}, %arg10: f32, %arg11: f32, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<256x64xf32>
    %c63_i32 = arith.constant 63 : i32
    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x64xf32>
    %cst_1 = arith.constant dense<0.000000e+00> : tensor<64xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c1_i64 = arith.constant 1 : i64
    %c4096_i64 = arith.constant 4096 : i64
    %c4096_i32 = arith.constant 4096 : i32
    %c256_i32 = arith.constant 256 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %0 = tt.get_program_id x : i32
    %1 = tt.get_program_id y : i32
    %2 = tt.load %arg6 : !tt.ptr<i32>
    %3 = tt.addptr %arg6, %c1_i32 : !tt.ptr<i32>, i32
    %4 = tt.load %3 : !tt.ptr<i32>
    %5 = arith.subi %4, %2 : i32
    %6 = arith.muli %1, %c64_i32 : i32
    %7 = arith.cmpi slt, %6, %5 : i32
    scf.if %7 {
      %8 = arith.extsi %2 : i32 to i64
      %9 = arith.muli %8, %c4096_i64 : i64
      %10 = tt.addptr %arg0, %9 : !tt.ptr<bf16>, i64
      %11 = tt.make_tensor_descriptor %10, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %12 = tt.addptr %arg3, %9 : !tt.ptr<bf16>, i64
      %13 = tt.make_tensor_descriptor %12, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %14 = arith.muli %8, %c2048_i64 : i64
      %15 = tt.addptr %arg1, %14 : !tt.ptr<bf16>, i64
      %16 = tt.make_tensor_descriptor %15, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %17 = tt.addptr %arg2, %14 : !tt.ptr<bf16>, i64
      %18 = tt.make_tensor_descriptor %17, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %19 = arith.muli %0, %c256_i32 : i32
      %20 = tt.descriptor_load %16[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %21 = tt.descriptor_load %18[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %22 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
      %23 = tt.splat %6 : i32 -> tensor<64xi32>
      %24 = arith.addi %23, %22 : tensor<64xi32>
      %25 = arith.cmpi sge, %arg12, %c0_i32 : i32
      %26 = scf.if %25 -> (i32) {
        %42 = arith.addi %6, %c64_i32 : i32
        %43 = arith.addi %42, %arg12 : i32
        %44 = arith.minsi %5, %43 : i32
        scf.yield %44 : i32
      } else {
        scf.yield %5 : i32
      }
      %27 = arith.subi %26, %6 : i32
      %28 = arith.addi %27, %c63_i32 : i32
      %29 = arith.divsi %28, %c64_i32 : i32
      %30 = arith.muli %29, %c2_i32 : i32
      %31:2 = scf.for %arg13 = %c0_i32 to %30 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<256x64xf32>, tensor<256x64xf32>)  : i32 {
        %42 = arith.divsi %arg13, %29 : i32
        %43 = arith.muli %42, %29 : i32
        %44 = arith.subi %arg13, %43 : i32
        %45 = arith.muli %0, %c2_i32 : i32
        %46 = arith.addi %45, %42 : i32
        %47 = arith.muli %44, %c64_i32 : i32
        %48 = arith.addi %6, %47 : i32
        %49 = arith.muli %46, %c256_i32 : i32
        %50 = tt.descriptor_load %11[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %51 = tt.descriptor_load %13[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %52 = tt.splat %48 : i32 -> tensor<64xi32>
        %53 = arith.addi %52, %22 : tensor<64xi32>
        %54 = tt.splat %5 : i32 -> tensor<64xi32>
        %55 = arith.cmpi slt, %53, %54 : tensor<64xi32>
        %56 = arith.muli %46, %arg9 : i32
        %57 = tt.addptr %arg4, %56 : !tt.ptr<f32>, i32
        %58 = tt.addptr %57, %2 : !tt.ptr<f32>, i32
        %59 = tt.splat %58 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %60 = tt.addptr %59, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %61 = tt.load %60, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %62 = tt.addptr %arg5, %56 : !tt.ptr<f32>, i32
        %63 = tt.addptr %62, %2 : !tt.ptr<f32>, i32
        %64 = tt.splat %63 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %65 = tt.addptr %64, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %66 = tt.load %65, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %67 = tt.trans %20 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %68 = tt.dot %50, %67, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %69 = tt.expand_dims %53 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32>
        %70 = tt.expand_dims %24 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
        %71 = tt.broadcast %69 : tensor<64x1xi32> -> tensor<64x64xi32>
        %72 = tt.broadcast %70 : tensor<1x64xi32> -> tensor<64x64xi32>
        %73 = arith.cmpi sge, %71, %72 : tensor<64x64xi32>
        %74 = tt.splat %5 : i32 -> tensor<64x1xi32>
        %75 = arith.cmpi slt, %69, %74 : tensor<64x1xi32>
        %76 = tt.broadcast %75 : tensor<64x1xi1> -> tensor<64x64xi1>
        %77 = arith.andi %73, %76 : tensor<64x64xi1>
        %78 = scf.if %25 -> (tensor<64x64xi1>) {
          %98 = arith.subi %71, %72 : tensor<64x64xi32>
          %99 = tt.splat %arg12 : i32 -> tensor<64x64xi32>
          %100 = arith.cmpi sle, %98, %99 : tensor<64x64xi32>
          %101 = arith.andi %77, %100 : tensor<64x64xi1>
          scf.yield %101 : tensor<64x64xi1>
        } else {
          scf.yield %77 : tensor<64x64xi1>
        }
        %79 = tt.splat %arg11 : f32 -> tensor<64x64xf32>
        %80 = arith.mulf %68, %79 : tensor<64x64xf32>
        %81 = tt.expand_dims %61 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %82 = tt.broadcast %81 : tensor<64x1xf32> -> tensor<64x64xf32>
        %83 = arith.subf %80, %82 : tensor<64x64xf32>
        %84 = math.exp2 %83 : tensor<64x64xf32>
        %85 = arith.select %78, %84, %cst_0 : tensor<64x64xi1>, tensor<64x64xf32>
        %86 = tt.trans %21 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %87 = tt.dot %51, %86, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %88 = tt.expand_dims %66 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %89 = tt.broadcast %88 : tensor<64x1xf32> -> tensor<64x64xf32>
        %90 = arith.subf %87, %89 : tensor<64x64xf32>
        %91 = arith.mulf %85, %90 : tensor<64x64xf32>
        %92 = tt.trans %51 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %93 = arith.truncf %85 : tensor<64x64xf32> to tensor<64x64xbf16>
        %94 = tt.dot %92, %93, %arg15, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        %95 = tt.trans %50 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %96 = arith.truncf %91 : tensor<64x64xf32> to tensor<64x64xbf16>
        %97 = tt.dot %95, %96, %arg14, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        scf.yield %97, %94 : tensor<256x64xf32>, tensor<256x64xf32>
      } {tt.warp_specialize}
      %32 = tt.addptr %arg7, %14 : !tt.ptr<bf16>, i64
      %33 = tt.make_tensor_descriptor %32, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %34 = tt.addptr %arg8, %14 : !tt.ptr<bf16>, i64
      %35 = tt.make_tensor_descriptor %34, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %36 = tt.splat %arg10 : f32 -> tensor<256x64xf32>
      %37 = arith.mulf %31#0, %36 : tensor<256x64xf32>
      %38 = arith.truncf %37 : tensor<256x64xf32> to tensor<256x64xbf16>
      %39 = tt.trans %38 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %33[%6, %19], %39 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
      %40 = arith.truncf %31#1 : tensor<256x64xf32> to tensor<256x64xbf16>
      %41 = tt.trans %40 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %35[%6, %19], %41 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
    }
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=4 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=2}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=2}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=2}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/dev/v2.py:24:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/dev/v2.py:24:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
{'ws2': True, 's2': 2} ['ERR:PassManager::run failed']
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: i32 {tt.divisibility = 16 : i32}, %arg10: f32, %arg11: f32, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<256x64xf32>
    %c63_i32 = arith.constant 63 : i32
    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x64xf32>
    %cst_1 = arith.constant dense<0.000000e+00> : tensor<64xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c1_i64 = arith.constant 1 : i64
    %c4096_i64 = arith.constant 4096 : i64
    %c4096_i32 = arith.constant 4096 : i32
    %c256_i32 = arith.constant 256 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %0 = tt.get_program_id x : i32
    %1 = tt.get_program_id y : i32
    %2 = tt.load %arg6 : !tt.ptr<i32>
    %3 = tt.addptr %arg6, %c1_i32 : !tt.ptr<i32>, i32
    %4 = tt.load %3 : !tt.ptr<i32>
    %5 = arith.subi %4, %2 : i32
    %6 = arith.muli %1, %c64_i32 : i32
    %7 = arith.cmpi slt, %6, %5 : i32
    scf.if %7 {
      %8 = arith.extsi %2 : i32 to i64
      %9 = arith.muli %8, %c4096_i64 : i64
      %10 = tt.addptr %arg0, %9 : !tt.ptr<bf16>, i64
      %11 = tt.make_tensor_descriptor %10, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %12 = tt.addptr %arg3, %9 : !tt.ptr<bf16>, i64
      %13 = tt.make_tensor_descriptor %12, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %14 = arith.muli %8, %c2048_i64 : i64
      %15 = tt.addptr %arg1, %14 : !tt.ptr<bf16>, i64
      %16 = tt.make_tensor_descriptor %15, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %17 = tt.addptr %arg2, %14 : !tt.ptr<bf16>, i64
      %18 = tt.make_tensor_descriptor %17, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %19 = arith.muli %0, %c256_i32 : i32
      %20 = tt.descriptor_load %16[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %21 = tt.descriptor_load %18[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %22 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
      %23 = tt.splat %6 : i32 -> tensor<64xi32>
      %24 = arith.addi %23, %22 : tensor<64xi32>
      %25 = arith.cmpi sge, %arg12, %c0_i32 : i32
      %26 = scf.if %25 -> (i32) {
        %42 = arith.addi %6, %c64_i32 : i32
        %43 = arith.addi %42, %arg12 : i32
        %44 = arith.minsi %5, %43 : i32
        scf.yield %44 : i32
      } else {
        scf.yield %5 : i32
      }
      %27 = arith.subi %26, %6 : i32
      %28 = arith.addi %27, %c63_i32 : i32
      %29 = arith.divsi %28, %c64_i32 : i32
      %30 = arith.muli %29, %c2_i32 : i32
      %31:2 = scf.for %arg13 = %c0_i32 to %30 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<256x64xf32>, tensor<256x64xf32>)  : i32 {
        %42 = arith.divsi %arg13, %29 : i32
        %43 = arith.muli %42, %29 : i32
        %44 = arith.subi %arg13, %43 : i32
        %45 = arith.muli %0, %c2_i32 : i32
        %46 = arith.addi %45, %42 : i32
        %47 = arith.muli %44, %c64_i32 : i32
        %48 = arith.addi %6, %47 : i32
        %49 = arith.muli %46, %c256_i32 : i32
        %50 = tt.descriptor_load %11[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %51 = tt.descriptor_load %13[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %52 = tt.splat %48 : i32 -> tensor<64xi32>
        %53 = arith.addi %52, %22 : tensor<64xi32>
        %54 = tt.splat %5 : i32 -> tensor<64xi32>
        %55 = arith.cmpi slt, %53, %54 : tensor<64xi32>
        %56 = arith.muli %46, %arg9 : i32
        %57 = tt.addptr %arg4, %56 : !tt.ptr<f32>, i32
        %58 = tt.addptr %57, %2 : !tt.ptr<f32>, i32
        %59 = tt.splat %58 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %60 = tt.addptr %59, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %61 = tt.load %60, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %62 = tt.addptr %arg5, %56 : !tt.ptr<f32>, i32
        %63 = tt.addptr %62, %2 : !tt.ptr<f32>, i32
        %64 = tt.splat %63 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %65 = tt.addptr %64, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %66 = tt.load %65, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %67 = tt.trans %20 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %68 = tt.dot %50, %67, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %69 = tt.expand_dims %53 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32>
        %70 = tt.expand_dims %24 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
        %71 = tt.broadcast %69 : tensor<64x1xi32> -> tensor<64x64xi32>
        %72 = tt.broadcast %70 : tensor<1x64xi32> -> tensor<64x64xi32>
        %73 = arith.cmpi sge, %71, %72 : tensor<64x64xi32>
        %74 = tt.splat %5 : i32 -> tensor<64x1xi32>
        %75 = arith.cmpi slt, %69, %74 : tensor<64x1xi32>
        %76 = tt.broadcast %75 : tensor<64x1xi1> -> tensor<64x64xi1>
        %77 = arith.andi %73, %76 : tensor<64x64xi1>
        %78 = scf.if %25 -> (tensor<64x64xi1>) {
          %98 = arith.subi %71, %72 : tensor<64x64xi32>
          %99 = tt.splat %arg12 : i32 -> tensor<64x64xi32>
          %100 = arith.cmpi sle, %98, %99 : tensor<64x64xi32>
          %101 = arith.andi %77, %100 : tensor<64x64xi1>
          scf.yield %101 : tensor<64x64xi1>
        } else {
          scf.yield %77 : tensor<64x64xi1>
        }
        %79 = tt.splat %arg11 : f32 -> tensor<64x64xf32>
        %80 = arith.mulf %68, %79 : tensor<64x64xf32>
        %81 = tt.expand_dims %61 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %82 = tt.broadcast %81 : tensor<64x1xf32> -> tensor<64x64xf32>
        %83 = arith.subf %80, %82 : tensor<64x64xf32>
        %84 = math.exp2 %83 : tensor<64x64xf32>
        %85 = arith.select %78, %84, %cst_0 : tensor<64x64xi1>, tensor<64x64xf32>
        %86 = tt.trans %21 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %87 = tt.dot %51, %86, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %88 = tt.expand_dims %66 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %89 = tt.broadcast %88 : tensor<64x1xf32> -> tensor<64x64xf32>
        %90 = arith.subf %87, %89 : tensor<64x64xf32>
        %91 = arith.mulf %85, %90 : tensor<64x64xf32>
        %92 = tt.trans %51 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %93 = arith.truncf %85 : tensor<64x64xf32> to tensor<64x64xbf16>
        %94 = tt.dot %92, %93, %arg15, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        %95 = tt.trans %50 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %96 = arith.truncf %91 : tensor<64x64xf32> to tensor<64x64xbf16>
        %97 = tt.dot %95, %96, %arg14, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        scf.yield %97, %94 : tensor<256x64xf32>, tensor<256x64xf32>
      } {tt.warp_specialize}
      %32 = tt.addptr %arg7, %14 : !tt.ptr<bf16>, i64
      %33 = tt.make_tensor_descriptor %32, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %34 = tt.addptr %arg8, %14 : !tt.ptr<bf16>, i64
      %35 = tt.make_tensor_descriptor %34, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %36 = tt.splat %arg10 : f32 -> tensor<256x64xf32>
      %37 = arith.mulf %31#0, %36 : tensor<256x64xf32>
      %38 = arith.truncf %37 : tensor<256x64xf32> to tensor<256x64xbf16>
      %39 = tt.trans %38 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %33[%6, %19], %39 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
      %40 = arith.truncf %31#1 : tensor<256x64xf32> to tensor<256x64xbf16>
      %41 = tt.trans %40 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %35[%6, %19], %41 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
    }
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=4 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=2}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=2}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=2}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/dev/v2.py:24:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/dev/v2.py:24:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
{'ws2': True, 's2': 1} ['ERR:PassManager::run failed']
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: i32 {tt.divisibility = 16 : i32}, %arg10: f32, %arg11: f32, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<256x64xf32>
    %c63_i32 = arith.constant 63 : i32
    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x64xf32>
    %cst_1 = arith.constant dense<0.000000e+00> : tensor<64xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c1_i64 = arith.constant 1 : i64
    %c4096_i64 = arith.constant 4096 : i64
    %c4096_i32 = arith.constant 4096 : i32
    %c256_i32 = arith.constant 256 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %0 = tt.get_program_id x : i32
    %1 = tt.get_program_id y : i32
    %2 = tt.load %arg6 : !tt.ptr<i32>
    %3 = tt.addptr %arg6, %c1_i32 : !tt.ptr<i32>, i32
    %4 = tt.load %3 : !tt.ptr<i32>
    %5 = arith.subi %4, %2 : i32
    %6 = arith.muli %1, %c64_i32 : i32
    %7 = arith.cmpi slt, %6, %5 : i32
    scf.if %7 {
      %8 = arith.extsi %2 : i32 to i64
      %9 = arith.muli %8, %c4096_i64 : i64
      %10 = tt.addptr %arg0, %9 : !tt.ptr<bf16>, i64
      %11 = tt.make_tensor_descriptor %10, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %12 = tt.addptr %arg3, %9 : !tt.ptr<bf16>, i64
      %13 = tt.make_tensor_descriptor %12, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %14 = arith.muli %8, %c2048_i64 : i64
      %15 = tt.addptr %arg1, %14 : !tt.ptr<bf16>, i64
      %16 = tt.make_tensor_descriptor %15, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %17 = tt.addptr %arg2, %14 : !tt.ptr<bf16>, i64
      %18 = tt.make_tensor_descriptor %17, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %19 = arith.muli %0, %c256_i32 : i32
      %20 = tt.descriptor_load %16[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %21 = tt.descriptor_load %18[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %22 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
      %23 = tt.splat %6 : i32 -> tensor<64xi32>
      %24 = arith.addi %23, %22 : tensor<64xi32>
      %25 = arith.cmpi sge, %arg12, %c0_i32 : i32
      %26 = scf.if %25 -> (i32) {
        %42 = arith.addi %6, %c64_i32 : i32
        %43 = arith.addi %42, %arg12 : i32
        %44 = arith.minsi %5, %43 : i32
        scf.yield %44 : i32
      } else {
        scf.yield %5 : i32
      }
      %27 = arith.subi %26, %6 : i32
      %28 = arith.addi %27, %c63_i32 : i32
      %29 = arith.divsi %28, %c64_i32 : i32
      %30 = arith.muli %29, %c2_i32 : i32
      %31:2 = scf.for %arg13 = %c0_i32 to %30 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<256x64xf32>, tensor<256x64xf32>)  : i32 {
        %42 = arith.divsi %arg13, %29 : i32
        %43 = arith.muli %42, %29 : i32
        %44 = arith.subi %arg13, %43 : i32
        %45 = arith.muli %0, %c2_i32 : i32
        %46 = arith.addi %45, %42 : i32
        %47 = arith.muli %44, %c64_i32 : i32
        %48 = arith.addi %6, %47 : i32
        %49 = arith.muli %46, %c256_i32 : i32
        %50 = tt.descriptor_load %11[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %51 = tt.descriptor_load %13[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %52 = tt.splat %48 : i32 -> tensor<64xi32>
        %53 = arith.addi %52, %22 : tensor<64xi32>
        %54 = tt.splat %5 : i32 -> tensor<64xi32>
        %55 = arith.cmpi slt, %53, %54 : tensor<64xi32>
        %56 = arith.muli %46, %arg9 : i32
        %57 = tt.addptr %arg4, %56 : !tt.ptr<f32>, i32
        %58 = tt.addptr %57, %2 : !tt.ptr<f32>, i32
        %59 = tt.splat %58 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %60 = tt.addptr %59, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %61 = tt.load %60, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %62 = tt.addptr %arg5, %56 : !tt.ptr<f32>, i32
        %63 = tt.addptr %62, %2 : !tt.ptr<f32>, i32
        %64 = tt.splat %63 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %65 = tt.addptr %64, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %66 = tt.load %65, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %67 = tt.trans %20 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %68 = tt.dot %50, %67, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %69 = tt.expand_dims %53 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32>
        %70 = tt.expand_dims %24 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
        %71 = tt.broadcast %69 : tensor<64x1xi32> -> tensor<64x64xi32>
        %72 = tt.broadcast %70 : tensor<1x64xi32> -> tensor<64x64xi32>
        %73 = arith.cmpi sge, %71, %72 : tensor<64x64xi32>
        %74 = tt.splat %5 : i32 -> tensor<64x1xi32>
        %75 = arith.cmpi slt, %69, %74 : tensor<64x1xi32>
        %76 = tt.broadcast %75 : tensor<64x1xi1> -> tensor<64x64xi1>
        %77 = arith.andi %73, %76 : tensor<64x64xi1>
        %78 = scf.if %25 -> (tensor<64x64xi1>) {
          %98 = arith.subi %71, %72 : tensor<64x64xi32>
          %99 = tt.splat %arg12 : i32 -> tensor<64x64xi32>
          %100 = arith.cmpi sle, %98, %99 : tensor<64x64xi32>
          %101 = arith.andi %77, %100 : tensor<64x64xi1>
          scf.yield %101 : tensor<64x64xi1>
        } else {
          scf.yield %77 : tensor<64x64xi1>
        }
        %79 = tt.splat %arg11 : f32 -> tensor<64x64xf32>
        %80 = arith.mulf %68, %79 : tensor<64x64xf32>
        %81 = tt.expand_dims %61 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %82 = tt.broadcast %81 : tensor<64x1xf32> -> tensor<64x64xf32>
        %83 = arith.subf %80, %82 : tensor<64x64xf32>
        %84 = math.exp2 %83 : tensor<64x64xf32>
        %85 = arith.select %78, %84, %cst_0 : tensor<64x64xi1>, tensor<64x64xf32>
        %86 = tt.trans %21 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %87 = tt.dot %51, %86, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %88 = tt.expand_dims %66 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %89 = tt.broadcast %88 : tensor<64x1xf32> -> tensor<64x64xf32>
        %90 = arith.subf %87, %89 : tensor<64x64xf32>
        %91 = arith.mulf %85, %90 : tensor<64x64xf32>
        %92 = tt.trans %51 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %93 = arith.truncf %85 : tensor<64x64xf32> to tensor<64x64xbf16>
        %94 = tt.dot %92, %93, %arg15, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        %95 = tt.trans %50 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %96 = arith.truncf %91 : tensor<64x64xf32> to tensor<64x64xbf16>
        %97 = tt.dot %95, %96, %arg14, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        scf.yield %97, %94 : tensor<256x64xf32>, tensor<256x64xf32>
      } {tt.warp_specialize}
      %32 = tt.addptr %arg7, %14 : !tt.ptr<bf16>, i64
      %33 = tt.make_tensor_descriptor %32, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %34 = tt.addptr %arg8, %14 : !tt.ptr<bf16>, i64
      %35 = tt.make_tensor_descriptor %34, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %36 = tt.splat %arg10 : f32 -> tensor<256x64xf32>
      %37 = arith.mulf %31#0, %36 : tensor<256x64xf32>
      %38 = arith.truncf %37 : tensor<256x64xf32> to tensor<256x64xbf16>
      %39 = tt.trans %38 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %33[%6, %19], %39 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
      %40 = arith.truncf %31#1 : tensor<256x64xf32> to tensor<256x64xbf16>
      %41 = tt.trans %40 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %35[%6, %19], %41 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
    }
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=8 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=2}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=2}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=2}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/dev/v2.py:24:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/dev/v2.py:24:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
{'w1': 8} ['ERR:PassManager::run failed']
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: i32 {tt.divisibility = 16 : i32}, %arg10: f32, %arg11: f32, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<256x64xf32>
    %c63_i32 = arith.constant 63 : i32
    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x64xf32>
    %cst_1 = arith.constant dense<0.000000e+00> : tensor<64xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c1_i64 = arith.constant 1 : i64
    %c4096_i64 = arith.constant 4096 : i64
    %c4096_i32 = arith.constant 4096 : i32
    %c256_i32 = arith.constant 256 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %0 = tt.get_program_id x : i32
    %1 = tt.get_program_id y : i32
    %2 = tt.load %arg6 : !tt.ptr<i32>
    %3 = tt.addptr %arg6, %c1_i32 : !tt.ptr<i32>, i32
    %4 = tt.load %3 : !tt.ptr<i32>
    %5 = arith.subi %4, %2 : i32
    %6 = arith.muli %1, %c64_i32 : i32
    %7 = arith.cmpi slt, %6, %5 : i32
    scf.if %7 {
      %8 = arith.extsi %2 : i32 to i64
      %9 = arith.muli %8, %c4096_i64 : i64
      %10 = tt.addptr %arg0, %9 : !tt.ptr<bf16>, i64
      %11 = tt.make_tensor_descriptor %10, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %12 = tt.addptr %arg3, %9 : !tt.ptr<bf16>, i64
      %13 = tt.make_tensor_descriptor %12, [%5, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %14 = arith.muli %8, %c2048_i64 : i64
      %15 = tt.addptr %arg1, %14 : !tt.ptr<bf16>, i64
      %16 = tt.make_tensor_descriptor %15, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %17 = tt.addptr %arg2, %14 : !tt.ptr<bf16>, i64
      %18 = tt.make_tensor_descriptor %17, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %19 = arith.muli %0, %c256_i32 : i32
      %20 = tt.descriptor_load %16[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %21 = tt.descriptor_load %18[%6, %19] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %22 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
      %23 = tt.splat %6 : i32 -> tensor<64xi32>
      %24 = arith.addi %23, %22 : tensor<64xi32>
      %25 = arith.cmpi sge, %arg12, %c0_i32 : i32
      %26 = scf.if %25 -> (i32) {
        %42 = arith.addi %6, %c64_i32 : i32
        %43 = arith.addi %42, %arg12 : i32
        %44 = arith.minsi %5, %43 : i32
        scf.yield %44 : i32
      } else {
        scf.yield %5 : i32
      }
      %27 = arith.subi %26, %6 : i32
      %28 = arith.addi %27, %c63_i32 : i32
      %29 = arith.divsi %28, %c64_i32 : i32
      %30 = arith.muli %29, %c2_i32 : i32
      %31:2 = scf.for %arg13 = %c0_i32 to %30 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<256x64xf32>, tensor<256x64xf32>)  : i32 {
        %42 = arith.divsi %arg13, %29 : i32
        %43 = arith.muli %42, %29 : i32
        %44 = arith.subi %arg13, %43 : i32
        %45 = arith.muli %0, %c2_i32 : i32
        %46 = arith.addi %45, %42 : i32
        %47 = arith.muli %44, %c64_i32 : i32
        %48 = arith.addi %6, %47 : i32
        %49 = arith.muli %46, %c256_i32 : i32
        %50 = tt.descriptor_load %11[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %51 = tt.descriptor_load %13[%48, %49] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %52 = tt.splat %48 : i32 -> tensor<64xi32>
        %53 = arith.addi %52, %22 : tensor<64xi32>
        %54 = tt.splat %5 : i32 -> tensor<64xi32>
        %55 = arith.cmpi slt, %53, %54 : tensor<64xi32>
        %56 = arith.muli %46, %arg9 : i32
        %57 = tt.addptr %arg4, %56 : !tt.ptr<f32>, i32
        %58 = tt.addptr %57, %2 : !tt.ptr<f32>, i32
        %59 = tt.splat %58 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %60 = tt.addptr %59, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %61 = tt.load %60, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %62 = tt.addptr %arg5, %56 : !tt.ptr<f32>, i32
        %63 = tt.addptr %62, %2 : !tt.ptr<f32>, i32
        %64 = tt.splat %63 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %65 = tt.addptr %64, %53 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %66 = tt.load %65, %55, %cst_1 : tensor<64x!tt.ptr<f32>>
        %67 = tt.trans %20 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %68 = tt.dot %50, %67, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %69 = tt.expand_dims %53 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32>
        %70 = tt.expand_dims %24 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
        %71 = tt.broadcast %69 : tensor<64x1xi32> -> tensor<64x64xi32>
        %72 = tt.broadcast %70 : tensor<1x64xi32> -> tensor<64x64xi32>
        %73 = arith.cmpi sge, %71, %72 : tensor<64x64xi32>
        %74 = tt.splat %5 : i32 -> tensor<64x1xi32>
        %75 = arith.cmpi slt, %69, %74 : tensor<64x1xi32>
        %76 = tt.broadcast %75 : tensor<64x1xi1> -> tensor<64x64xi1>
        %77 = arith.andi %73, %76 : tensor<64x64xi1>
        %78 = scf.if %25 -> (tensor<64x64xi1>) {
          %98 = arith.subi %71, %72 : tensor<64x64xi32>
          %99 = tt.splat %arg12 : i32 -> tensor<64x64xi32>
          %100 = arith.cmpi sle, %98, %99 : tensor<64x64xi32>
          %101 = arith.andi %77, %100 : tensor<64x64xi1>
          scf.yield %101 : tensor<64x64xi1>
        } else {
          scf.yield %77 : tensor<64x64xi1>
        }
        %79 = tt.splat %arg11 : f32 -> tensor<64x64xf32>
        %80 = arith.mulf %68, %79 : tensor<64x64xf32>
        %81 = tt.expand_dims %61 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %82 = tt.broadcast %81 : tensor<64x1xf32> -> tensor<64x64xf32>
        %83 = arith.subf %80, %82 : tensor<64x64xf32>
        %84 = math.exp2 %83 : tensor<64x64xf32>
        %85 = arith.select %78, %84, %cst_0 : tensor<64x64xi1>, tensor<64x64xf32>
        %86 = tt.trans %21 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %87 = tt.dot %51, %86, %cst_0, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %88 = tt.expand_dims %66 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %89 = tt.broadcast %88 : tensor<64x1xf32> -> tensor<64x64xf32>
        %90 = arith.subf %87, %89 : tensor<64x64xf32>
        %91 = arith.mulf %85, %90 : tensor<64x64xf32>
        %92 = tt.trans %51 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %93 = arith.truncf %85 : tensor<64x64xf32> to tensor<64x64xbf16>
        %94 = tt.dot %92, %93, %arg15, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        %95 = tt.trans %50 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %96 = arith.truncf %91 : tensor<64x64xf32> to tensor<64x64xbf16>
        %97 = tt.dot %95, %96, %arg14, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        scf.yield %97, %94 : tensor<256x64xf32>, tensor<256x64xf32>
      } {tt.warp_specialize}
      %32 = tt.addptr %arg7, %14 : !tt.ptr<bf16>, i64
      %33 = tt.make_tensor_descriptor %32, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %34 = tt.addptr %arg8, %14 : !tt.ptr<bf16>, i64
      %35 = tt.make_tensor_descriptor %34, [%5, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %36 = tt.splat %arg10 : f32 -> tensor<256x64xf32>
      %37 = arith.mulf %31#0, %36 : tensor<256x64xf32>
      %38 = arith.truncf %37 : tensor<256x64xf32> to tensor<256x64xbf16>
      %39 = tt.trans %38 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %33[%6, %19], %39 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
      %40 = arith.truncf %31#1 : tensor<256x64xf32> to tensor<256x64xbf16>
      %41 = tt.trans %40 {order = array<i32: 1, 0>} : tensor<256x64xbf16> -> tensor<64x256xbf16>
      tt.descriptor_store %35[%6, %19], %41 : !tt.tensordesc<tensor<64x256xbf16>>, tensor<64x256xbf16>
    }
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=8 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=2}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=2}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=2}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/dev/v2.py:24:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/dev/v2.py:24:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
{'w2': 8} ['ERR:PassManager::run failed']
