python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv2(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: f32, %arg10: f32, %arg11: i32 {tt.divisibility = 16 : i32}, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<64x256xf32>
    %c127_i32 = arith.constant 127 : i32
    %cst_0 = arith.constant dense<256> : tensor<64xi64>
    %cst_1 = arith.constant dense<8> : tensor<64xi64>
    %cst_2 = arith.constant dense<0.000000e+00> : tensor<128x64xf32>
    %cst_3 = arith.constant dense<0.000000e+00> : tensor<128xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c128_i32 = arith.constant 128 : i32
    %c256_i32 = arith.constant 256 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %c8_i32 = arith.constant 8 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c4096_i32 = arith.constant 4096 : i32
    %c4096_i64 = arith.constant 4096 : i64
    %c1_i64 = arith.constant 1 : i64
    %0 = tt.make_tensor_descriptor %arg0, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<128x256xbf16>>
    %1 = tt.make_tensor_descriptor %arg3, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<128x256xbf16>>
    %2 = tt.make_tensor_descriptor %arg1, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %3 = tt.make_tensor_descriptor %arg2, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %4 = tt.get_program_id x : i32
    %5 = arith.remsi %4, %c8_i32 : i32
    %6 = arith.divsi %4, %c8_i32 : i32
    %7 = tt.get_program_id y : i32
    %8 = tt.addptr %arg6, %6 : !tt.ptr<i32>, i32
    %9 = tt.load %8 : !tt.ptr<i32>
    %10 = tt.addptr %8, %c1_i32 : !tt.ptr<i32>, i32
    %11 = tt.load %10 : !tt.ptr<i32>
    %12 = arith.subi %11, %9 : i32
    %13 = arith.muli %7, %c64_i32 : i32
    %14 = arith.cmpi sge, %13, %12 : i32
    cf.cond_br %14, ^bb1, ^bb2
  ^bb1:  // pred: ^bb0
    tt.return
  ^bb2:  // pred: ^bb0
    %15 = arith.addi %9, %13 : i32
    %16 = arith.muli %5, %c256_i32 : i32
    %17 = tt.descriptor_load %2[%15, %16] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
    %18 = tt.descriptor_load %3[%15, %16] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
    %19 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
    %20 = tt.splat %13 : i32 -> tensor<64xi32>
    %21 = arith.addi %20, %19 : tensor<64xi32>
    %22 = arith.divsi %13, %c128_i32 : i32
    %23 = arith.muli %22, %c128_i32 : i32
    %24 = arith.cmpi sge, %arg12, %c0_i32 : i32
    %25 = scf.if %24 -> (i32) {
      %60 = arith.addi %13, %c64_i32 : i32
      %61 = arith.addi %60, %arg12 : i32
      %62 = arith.minsi %12, %61 : i32
      scf.yield %62 : i32
    } else {
      scf.yield %12 : i32
    }
    %26 = arith.subi %25, %23 : i32
    %27 = arith.addi %26, %c127_i32 : i32
    %28 = arith.divsi %27, %c128_i32 : i32
    %29 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32>
    %30 = arith.muli %28, %c2_i32 : i32
    %31:2 = scf.for %arg13 = %c0_i32 to %30 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<64x256xf32>, tensor<64x256xf32>)  : i32 {
      %60 = arith.divsi %arg13, %28 : i32
      %61 = arith.muli %60, %28 : i32
      %62 = arith.subi %arg13, %61 : i32
      %63 = arith.muli %62, %c128_i32 : i32
      %64 = arith.addi %23, %63 : i32
      %65 = arith.muli %5, %c2_i32 : i32
      %66 = arith.addi %65, %60 : i32
      %67 = arith.addi %9, %64 : i32
      %68 = arith.muli %66, %c256_i32 : i32
      %69 = tt.descriptor_load %0[%67, %68] : !tt.tensordesc<tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %70 = tt.descriptor_load %1[%67, %68] : !tt.tensordesc<tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %71 = tt.splat %64 : i32 -> tensor<128xi32>
      %72 = arith.addi %71, %29 : tensor<128xi32>
      %73 = tt.splat %12 : i32 -> tensor<128xi32>
      %74 = arith.cmpi slt, %72, %73 : tensor<128xi32>
      %75 = arith.extsi %66 : i32 to i64
      %76 = arith.extsi %arg11 : i32 to i64
      %77 = arith.muli %75, %76 : i64
      %78 = arith.extsi %9 : i32 to i64
      %79 = arith.addi %77, %78 : i64
      %80 = arith.extsi %72 : tensor<128xi32> to tensor<128xi64>
      %81 = tt.splat %79 : i64 -> tensor<128xi64>
      %82 = arith.addi %81, %80 : tensor<128xi64>
      %83 = tt.splat %arg4 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>>
      %84 = tt.addptr %83, %82 : tensor<128x!tt.ptr<f32>>, tensor<128xi64>
      %85 = tt.load %84, %74, %cst_3 : tensor<128x!tt.ptr<f32>>
      %86 = tt.splat %arg5 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>>
      %87 = tt.addptr %86, %82 : tensor<128x!tt.ptr<f32>>, tensor<128xi64>
      %88 = tt.load %87, %74, %cst_3 : tensor<128x!tt.ptr<f32>>
      %89 = tt.trans %17 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
      %90 = tt.dot %69, %89, %cst_2, inputPrecision = tf32 : tensor<128x256xbf16> * tensor<256x64xbf16> -> tensor<128x64xf32>
      %91 = tt.expand_dims %21 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
      %92 = tt.expand_dims %72 {axis = 1 : i32} : tensor<128xi32> -> tensor<128x1xi32>
      %93 = tt.broadcast %91 : tensor<1x64xi32> -> tensor<128x64xi32>
      %94 = tt.broadcast %92 : tensor<128x1xi32> -> tensor<128x64xi32>
      %95 = arith.cmpi sle, %93, %94 : tensor<128x64xi32>
      %96 = tt.expand_dims %74 {axis = 1 : i32} : tensor<128xi1> -> tensor<128x1xi1>
      %97 = tt.broadcast %96 : tensor<128x1xi1> -> tensor<128x64xi1>
      %98 = arith.andi %95, %97 : tensor<128x64xi1>
      %99 = scf.if %24 -> (tensor<128x64xi1>) {
        %119 = arith.subi %94, %93 : tensor<128x64xi32>
        %120 = tt.splat %arg12 : i32 -> tensor<128x64xi32>
        %121 = arith.cmpi sle, %119, %120 : tensor<128x64xi32>
        %122 = arith.andi %98, %121 : tensor<128x64xi1>
        scf.yield %122 : tensor<128x64xi1>
      } else {
        scf.yield %98 : tensor<128x64xi1>
      }
      %100 = tt.splat %arg9 : f32 -> tensor<128x64xf32>
      %101 = arith.mulf %90, %100 : tensor<128x64xf32>
      %102 = tt.expand_dims %85 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32>
      %103 = tt.broadcast %102 : tensor<128x1xf32> -> tensor<128x64xf32>
      %104 = arith.subf %101, %103 : tensor<128x64xf32>
      %105 = math.exp2 %104 : tensor<128x64xf32>
      %106 = arith.select %99, %105, %cst_2 : tensor<128x64xi1>, tensor<128x64xf32>
      %107 = tt.trans %18 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
      %108 = tt.dot %70, %107, %cst_2, inputPrecision = tf32 : tensor<128x256xbf16> * tensor<256x64xbf16> -> tensor<128x64xf32>
      %109 = arith.truncf %106 : tensor<128x64xf32> to tensor<128x64xbf16>
      %110 = tt.trans %109 {order = array<i32: 1, 0>} : tensor<128x64xbf16> -> tensor<64x128xbf16>
      %111 = tt.dot %110, %70, %arg15, inputPrecision = tf32 : tensor<64x128xbf16> * tensor<128x256xbf16> -> tensor<64x256xf32>
      %112 = tt.expand_dims %88 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32>
      %113 = tt.broadcast %112 : tensor<128x1xf32> -> tensor<128x64xf32>
      %114 = arith.subf %108, %113 : tensor<128x64xf32>
      %115 = arith.mulf %106, %114 : tensor<128x64xf32>
      %116 = arith.truncf %115 : tensor<128x64xf32> to tensor<128x64xbf16>
      %117 = tt.trans %116 {order = array<i32: 1, 0>} : tensor<128x64xbf16> -> tensor<64x128xbf16>
      %118 = tt.dot %117, %69, %arg14, inputPrecision = tf32 : tensor<64x128xbf16> * tensor<128x256xbf16> -> tensor<64x256xf32>
      scf.yield %118, %111 : tensor<64x256xf32>, tensor<64x256xf32>
    } {tt.num_stages = 1 : i32, tt.warp_specialize}
    %32 = tt.splat %12 : i32 -> tensor<64xi32>
    %33 = arith.cmpi slt, %21, %32 : tensor<64xi32>
    %34 = tt.splat %9 : i32 -> tensor<64xi32>
    %35 = arith.addi %34, %21 : tensor<64xi32>
    %36 = arith.extsi %35 : tensor<64xi32> to tensor<64xi64>
    %37 = arith.muli %36, %cst_1 : tensor<64xi64>
    %38 = arith.extsi %5 : i32 to i64
    %39 = tt.splat %38 : i64 -> tensor<64xi64>
    %40 = arith.addi %37, %39 : tensor<64xi64>
    %41 = arith.muli %40, %cst_0 : tensor<64xi64>
    %42 = tt.make_range {end = 256 : i32, start = 0 : i32} : tensor<256xi32>
    %43 = tt.expand_dims %33 {axis = 1 : i32} : tensor<64xi1> -> tensor<64x1xi1>
    %44 = tt.expand_dims %41 {axis = 1 : i32} : tensor<64xi64> -> tensor<64x1xi64>
    %45 = tt.splat %arg7 : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>>
    %46 = tt.addptr %45, %44 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi64>
    %47 = tt.expand_dims %42 {axis = 0 : i32} : tensor<256xi32> -> tensor<1x256xi32>
    %48 = tt.broadcast %46 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x256x!tt.ptr<bf16>>
    %49 = tt.broadcast %47 : tensor<1x256xi32> -> tensor<64x256xi32>
    %50 = tt.addptr %48, %49 : tensor<64x256x!tt.ptr<bf16>>, tensor<64x256xi32>
    %51 = tt.splat %arg10 : f32 -> tensor<64x256xf32>
    %52 = arith.mulf %31#0, %51 : tensor<64x256xf32>
    %53 = arith.truncf %52 : tensor<64x256xf32> to tensor<64x256xbf16>
    %54 = tt.broadcast %43 : tensor<64x1xi1> -> tensor<64x256xi1>
    tt.store %50, %53, %54 : tensor<64x256x!tt.ptr<bf16>>
    %55 = tt.splat %arg8 : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>>
    %56 = tt.addptr %55, %44 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi64>
    %57 = tt.broadcast %56 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x256x!tt.ptr<bf16>>
    %58 = tt.addptr %57, %49 : tensor<64x256x!tt.ptr<bf16>>, tensor<64x256xi32>
    %59 = arith.truncf %31#1 : tensor<64x256xf32> to tensor<64x256xbf16>
    tt.store %58, %59, %54 : tensor<64x256x!tt.ptr<bf16>>
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=4 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=3}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=3}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=3}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/sol_v1.py:81:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/sol_v1.py:81:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
{"KV_T": 1, "KV_S": 1, "KV_BM": 128, "KV_BN": 64, "KV_W": 4, "KV_WS": true, "Q_S": 2, "Q_BM": 128, "Q_BN": 32, "Q_W": 4, "Q_WS": true} s0: ERR PassManager::run failed
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv2(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: f32, %arg10: f32, %arg11: i32 {tt.divisibility = 16 : i32}, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<64x256xf32>
    %c63_i32 = arith.constant 63 : i32
    %cst_0 = arith.constant dense<256> : tensor<64xi64>
    %cst_1 = arith.constant dense<8> : tensor<64xi64>
    %cst_2 = arith.constant dense<0.000000e+00> : tensor<64x64xf32>
    %cst_3 = arith.constant dense<0.000000e+00> : tensor<64xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c256_i32 = arith.constant 256 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %c8_i32 = arith.constant 8 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c4096_i32 = arith.constant 4096 : i32
    %c4096_i64 = arith.constant 4096 : i64
    %c1_i64 = arith.constant 1 : i64
    %0 = tt.make_tensor_descriptor %arg0, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %1 = tt.make_tensor_descriptor %arg3, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %2 = tt.make_tensor_descriptor %arg1, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %3 = tt.make_tensor_descriptor %arg2, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %4 = tt.get_program_id x : i32
    %5 = arith.remsi %4, %c8_i32 : i32
    %6 = arith.divsi %4, %c8_i32 : i32
    %7 = tt.get_program_id y : i32
    %8 = tt.addptr %arg6, %6 : !tt.ptr<i32>, i32
    %9 = tt.load %8 : !tt.ptr<i32>
    %10 = tt.addptr %8, %c1_i32 : !tt.ptr<i32>, i32
    %11 = tt.load %10 : !tt.ptr<i32>
    %12 = arith.subi %11, %9 : i32
    %13 = arith.muli %7, %c64_i32 : i32
    %14 = arith.cmpi sge, %13, %12 : i32
    cf.cond_br %14, ^bb1, ^bb2
  ^bb1:  // pred: ^bb0
    tt.return
  ^bb2:  // pred: ^bb0
    %15 = arith.addi %9, %13 : i32
    %16 = arith.muli %5, %c256_i32 : i32
    %17 = tt.descriptor_load %2[%15, %16] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
    %18 = tt.descriptor_load %3[%15, %16] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
    %19 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
    %20 = tt.splat %13 : i32 -> tensor<64xi32>
    %21 = arith.addi %20, %19 : tensor<64xi32>
    %22 = arith.divsi %13, %c64_i32 : i32
    %23 = arith.muli %22, %c64_i32 : i32
    %24 = arith.cmpi sge, %arg12, %c0_i32 : i32
    %25 = scf.if %24 -> (i32) {
      %59 = arith.addi %13, %c64_i32 : i32
      %60 = arith.addi %59, %arg12 : i32
      %61 = arith.minsi %12, %60 : i32
      scf.yield %61 : i32
    } else {
      scf.yield %12 : i32
    }
    %26 = arith.subi %25, %23 : i32
    %27 = arith.addi %26, %c63_i32 : i32
    %28 = arith.divsi %27, %c64_i32 : i32
    %29 = arith.muli %28, %c2_i32 : i32
    %30:2 = scf.for %arg13 = %c0_i32 to %29 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<64x256xf32>, tensor<64x256xf32>)  : i32 {
      %59 = arith.divsi %arg13, %28 : i32
      %60 = arith.muli %59, %28 : i32
      %61 = arith.subi %arg13, %60 : i32
      %62 = arith.muli %61, %c64_i32 : i32
      %63 = arith.addi %23, %62 : i32
      %64 = arith.muli %5, %c2_i32 : i32
      %65 = arith.addi %64, %59 : i32
      %66 = arith.addi %9, %63 : i32
      %67 = arith.muli %65, %c256_i32 : i32
      %68 = tt.descriptor_load %0[%66, %67] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %69 = tt.descriptor_load %1[%66, %67] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %70 = tt.splat %63 : i32 -> tensor<64xi32>
      %71 = arith.addi %70, %19 : tensor<64xi32>
      %72 = tt.splat %12 : i32 -> tensor<64xi32>
      %73 = arith.cmpi slt, %71, %72 : tensor<64xi32>
      %74 = arith.extsi %65 : i32 to i64
      %75 = arith.extsi %arg11 : i32 to i64
      %76 = arith.muli %74, %75 : i64
      %77 = arith.extsi %9 : i32 to i64
      %78 = arith.addi %76, %77 : i64
      %79 = arith.extsi %71 : tensor<64xi32> to tensor<64xi64>
      %80 = tt.splat %78 : i64 -> tensor<64xi64>
      %81 = arith.addi %80, %79 : tensor<64xi64>
      %82 = tt.splat %arg4 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
      %83 = tt.addptr %82, %81 : tensor<64x!tt.ptr<f32>>, tensor<64xi64>
      %84 = tt.load %83, %73, %cst_3 : tensor<64x!tt.ptr<f32>>
      %85 = tt.splat %arg5 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
      %86 = tt.addptr %85, %81 : tensor<64x!tt.ptr<f32>>, tensor<64xi64>
      %87 = tt.load %86, %73, %cst_3 : tensor<64x!tt.ptr<f32>>
      %88 = tt.trans %17 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
      %89 = tt.dot %68, %88, %cst_2, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
      %90 = tt.expand_dims %21 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
      %91 = tt.expand_dims %71 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32>
      %92 = tt.broadcast %90 : tensor<1x64xi32> -> tensor<64x64xi32>
      %93 = tt.broadcast %91 : tensor<64x1xi32> -> tensor<64x64xi32>
      %94 = arith.cmpi sle, %92, %93 : tensor<64x64xi32>
      %95 = tt.expand_dims %73 {axis = 1 : i32} : tensor<64xi1> -> tensor<64x1xi1>
      %96 = tt.broadcast %95 : tensor<64x1xi1> -> tensor<64x64xi1>
      %97 = arith.andi %94, %96 : tensor<64x64xi1>
      %98 = scf.if %24 -> (tensor<64x64xi1>) {
        %118 = arith.subi %93, %92 : tensor<64x64xi32>
        %119 = tt.splat %arg12 : i32 -> tensor<64x64xi32>
        %120 = arith.cmpi sle, %118, %119 : tensor<64x64xi32>
        %121 = arith.andi %97, %120 : tensor<64x64xi1>
        scf.yield %121 : tensor<64x64xi1>
      } else {
        scf.yield %97 : tensor<64x64xi1>
      }
      %99 = tt.splat %arg9 : f32 -> tensor<64x64xf32>
      %100 = arith.mulf %89, %99 : tensor<64x64xf32>
      %101 = tt.expand_dims %84 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
      %102 = tt.broadcast %101 : tensor<64x1xf32> -> tensor<64x64xf32>
      %103 = arith.subf %100, %102 : tensor<64x64xf32>
      %104 = math.exp2 %103 : tensor<64x64xf32>
      %105 = arith.select %98, %104, %cst_2 : tensor<64x64xi1>, tensor<64x64xf32>
      %106 = tt.trans %18 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
      %107 = tt.dot %69, %106, %cst_2, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
      %108 = arith.truncf %105 : tensor<64x64xf32> to tensor<64x64xbf16>
      %109 = tt.trans %108 {order = array<i32: 1, 0>} : tensor<64x64xbf16> -> tensor<64x64xbf16>
      %110 = tt.dot %109, %69, %arg15, inputPrecision = tf32 : tensor<64x64xbf16> * tensor<64x256xbf16> -> tensor<64x256xf32>
      %111 = tt.expand_dims %87 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
      %112 = tt.broadcast %111 : tensor<64x1xf32> -> tensor<64x64xf32>
      %113 = arith.subf %107, %112 : tensor<64x64xf32>
      %114 = arith.mulf %105, %113 : tensor<64x64xf32>
      %115 = arith.truncf %114 : tensor<64x64xf32> to tensor<64x64xbf16>
      %116 = tt.trans %115 {order = array<i32: 1, 0>} : tensor<64x64xbf16> -> tensor<64x64xbf16>
      %117 = tt.dot %116, %68, %arg14, inputPrecision = tf32 : tensor<64x64xbf16> * tensor<64x256xbf16> -> tensor<64x256xf32>
      scf.yield %117, %110 : tensor<64x256xf32>, tensor<64x256xf32>
    } {tt.num_stages = 2 : i32, tt.warp_specialize}
    %31 = tt.splat %12 : i32 -> tensor<64xi32>
    %32 = arith.cmpi slt, %21, %31 : tensor<64xi32>
    %33 = tt.splat %9 : i32 -> tensor<64xi32>
    %34 = arith.addi %33, %21 : tensor<64xi32>
    %35 = arith.extsi %34 : tensor<64xi32> to tensor<64xi64>
    %36 = arith.muli %35, %cst_1 : tensor<64xi64>
    %37 = arith.extsi %5 : i32 to i64
    %38 = tt.splat %37 : i64 -> tensor<64xi64>
    %39 = arith.addi %36, %38 : tensor<64xi64>
    %40 = arith.muli %39, %cst_0 : tensor<64xi64>
    %41 = tt.make_range {end = 256 : i32, start = 0 : i32} : tensor<256xi32>
    %42 = tt.expand_dims %32 {axis = 1 : i32} : tensor<64xi1> -> tensor<64x1xi1>
    %43 = tt.expand_dims %40 {axis = 1 : i32} : tensor<64xi64> -> tensor<64x1xi64>
    %44 = tt.splat %arg7 : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>>
    %45 = tt.addptr %44, %43 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi64>
    %46 = tt.expand_dims %41 {axis = 0 : i32} : tensor<256xi32> -> tensor<1x256xi32>
    %47 = tt.broadcast %45 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x256x!tt.ptr<bf16>>
    %48 = tt.broadcast %46 : tensor<1x256xi32> -> tensor<64x256xi32>
    %49 = tt.addptr %47, %48 : tensor<64x256x!tt.ptr<bf16>>, tensor<64x256xi32>
    %50 = tt.splat %arg10 : f32 -> tensor<64x256xf32>
    %51 = arith.mulf %30#0, %50 : tensor<64x256xf32>
    %52 = arith.truncf %51 : tensor<64x256xf32> to tensor<64x256xbf16>
    %53 = tt.broadcast %42 : tensor<64x1xi1> -> tensor<64x256xi1>
    tt.store %49, %52, %53 : tensor<64x256x!tt.ptr<bf16>>
    %54 = tt.splat %arg8 : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>>
    %55 = tt.addptr %54, %43 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi64>
    %56 = tt.broadcast %55 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x256x!tt.ptr<bf16>>
    %57 = tt.addptr %56, %48 : tensor<64x256x!tt.ptr<bf16>>, tensor<64x256xi32>
    %58 = arith.truncf %30#1 : tensor<64x256xf32> to tensor<64x256xbf16>
    tt.store %57, %58, %53 : tensor<64x256x!tt.ptr<bf16>>
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=4 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=3}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=3}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=3}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/sol_v1.py:81:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/sol_v1.py:81:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
{"KV_T": 1, "KV_S": 2, "KV_BM": 64, "KV_BN": 64, "KV_W": 4, "KV_WS": true, "Q_S": 1, "Q_BM": 128, "Q_BN": 64, "Q_W": 4, "Q_WS": true} s0: ERR PassManager::run failed
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv2(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: f32, %arg10: f32, %arg11: i32 {tt.divisibility = 16 : i32}, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<64x256xf32>
    %c127_i32 = arith.constant 127 : i32
    %cst_0 = arith.constant dense<256> : tensor<64xi64>
    %cst_1 = arith.constant dense<8> : tensor<64xi64>
    %cst_2 = arith.constant dense<0.000000e+00> : tensor<128x64xf32>
    %cst_3 = arith.constant dense<0.000000e+00> : tensor<128xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c128_i32 = arith.constant 128 : i32
    %c256_i32 = arith.constant 256 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %c8_i32 = arith.constant 8 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c4096_i32 = arith.constant 4096 : i32
    %c4096_i64 = arith.constant 4096 : i64
    %c1_i64 = arith.constant 1 : i64
    %0 = tt.make_tensor_descriptor %arg0, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<128x256xbf16>>
    %1 = tt.make_tensor_descriptor %arg3, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<128x256xbf16>>
    %2 = tt.make_tensor_descriptor %arg1, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %3 = tt.make_tensor_descriptor %arg2, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %4 = tt.get_program_id x : i32
    %5 = arith.remsi %4, %c8_i32 : i32
    %6 = arith.divsi %4, %c8_i32 : i32
    %7 = tt.get_program_id y : i32
    %8 = tt.addptr %arg6, %6 : !tt.ptr<i32>, i32
    %9 = tt.load %8 : !tt.ptr<i32>
    %10 = tt.addptr %8, %c1_i32 : !tt.ptr<i32>, i32
    %11 = tt.load %10 : !tt.ptr<i32>
    %12 = arith.subi %11, %9 : i32
    %13 = arith.muli %7, %c64_i32 : i32
    %14 = arith.cmpi sge, %13, %12 : i32
    cf.cond_br %14, ^bb1, ^bb2
  ^bb1:  // pred: ^bb0
    tt.return
  ^bb2:  // pred: ^bb0
    %15 = arith.addi %9, %13 : i32
    %16 = arith.muli %5, %c256_i32 : i32
    %17 = tt.descriptor_load %2[%15, %16] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
    %18 = tt.descriptor_load %3[%15, %16] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
    %19 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
    %20 = tt.splat %13 : i32 -> tensor<64xi32>
    %21 = arith.addi %20, %19 : tensor<64xi32>
    %22 = arith.divsi %13, %c128_i32 : i32
    %23 = arith.muli %22, %c128_i32 : i32
    %24 = arith.cmpi sge, %arg12, %c0_i32 : i32
    %25 = scf.if %24 -> (i32) {
      %60 = arith.addi %13, %c64_i32 : i32
      %61 = arith.addi %60, %arg12 : i32
      %62 = arith.minsi %12, %61 : i32
      scf.yield %62 : i32
    } else {
      scf.yield %12 : i32
    }
    %26 = arith.subi %25, %23 : i32
    %27 = arith.addi %26, %c127_i32 : i32
    %28 = arith.divsi %27, %c128_i32 : i32
    %29 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32>
    %30 = arith.muli %28, %c2_i32 : i32
    %31:2 = scf.for %arg13 = %c0_i32 to %30 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<64x256xf32>, tensor<64x256xf32>)  : i32 {
      %60 = arith.divsi %arg13, %28 : i32
      %61 = arith.muli %60, %28 : i32
      %62 = arith.subi %arg13, %61 : i32
      %63 = arith.muli %62, %c128_i32 : i32
      %64 = arith.addi %23, %63 : i32
      %65 = arith.muli %5, %c2_i32 : i32
      %66 = arith.addi %65, %60 : i32
      %67 = arith.addi %9, %64 : i32
      %68 = arith.muli %66, %c256_i32 : i32
      %69 = tt.descriptor_load %0[%67, %68] : !tt.tensordesc<tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %70 = tt.descriptor_load %1[%67, %68] : !tt.tensordesc<tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %71 = tt.splat %64 : i32 -> tensor<128xi32>
      %72 = arith.addi %71, %29 : tensor<128xi32>
      %73 = tt.splat %12 : i32 -> tensor<128xi32>
      %74 = arith.cmpi slt, %72, %73 : tensor<128xi32>
      %75 = arith.extsi %66 : i32 to i64
      %76 = arith.extsi %arg11 : i32 to i64
      %77 = arith.muli %75, %76 : i64
      %78 = arith.extsi %9 : i32 to i64
      %79 = arith.addi %77, %78 : i64
      %80 = arith.extsi %72 : tensor<128xi32> to tensor<128xi64>
      %81 = tt.splat %79 : i64 -> tensor<128xi64>
      %82 = arith.addi %81, %80 : tensor<128xi64>
      %83 = tt.splat %arg4 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>>
      %84 = tt.addptr %83, %82 : tensor<128x!tt.ptr<f32>>, tensor<128xi64>
      %85 = tt.load %84, %74, %cst_3 : tensor<128x!tt.ptr<f32>>
      %86 = tt.splat %arg5 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>>
      %87 = tt.addptr %86, %82 : tensor<128x!tt.ptr<f32>>, tensor<128xi64>
      %88 = tt.load %87, %74, %cst_3 : tensor<128x!tt.ptr<f32>>
      %89 = tt.trans %17 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
      %90 = tt.dot %69, %89, %cst_2, inputPrecision = tf32 : tensor<128x256xbf16> * tensor<256x64xbf16> -> tensor<128x64xf32>
      %91 = tt.expand_dims %21 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
      %92 = tt.expand_dims %72 {axis = 1 : i32} : tensor<128xi32> -> tensor<128x1xi32>
      %93 = tt.broadcast %91 : tensor<1x64xi32> -> tensor<128x64xi32>
      %94 = tt.broadcast %92 : tensor<128x1xi32> -> tensor<128x64xi32>
      %95 = arith.cmpi sle, %93, %94 : tensor<128x64xi32>
      %96 = tt.expand_dims %74 {axis = 1 : i32} : tensor<128xi1> -> tensor<128x1xi1>
      %97 = tt.broadcast %96 : tensor<128x1xi1> -> tensor<128x64xi1>
      %98 = arith.andi %95, %97 : tensor<128x64xi1>
      %99 = scf.if %24 -> (tensor<128x64xi1>) {
        %119 = arith.subi %94, %93 : tensor<128x64xi32>
        %120 = tt.splat %arg12 : i32 -> tensor<128x64xi32>
        %121 = arith.cmpi sle, %119, %120 : tensor<128x64xi32>
        %122 = arith.andi %98, %121 : tensor<128x64xi1>
        scf.yield %122 : tensor<128x64xi1>
      } else {
        scf.yield %98 : tensor<128x64xi1>
      }
      %100 = tt.splat %arg9 : f32 -> tensor<128x64xf32>
      %101 = arith.mulf %90, %100 : tensor<128x64xf32>
      %102 = tt.expand_dims %85 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32>
      %103 = tt.broadcast %102 : tensor<128x1xf32> -> tensor<128x64xf32>
      %104 = arith.subf %101, %103 : tensor<128x64xf32>
      %105 = math.exp2 %104 : tensor<128x64xf32>
      %106 = arith.select %99, %105, %cst_2 : tensor<128x64xi1>, tensor<128x64xf32>
      %107 = tt.trans %18 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
      %108 = tt.dot %70, %107, %cst_2, inputPrecision = tf32 : tensor<128x256xbf16> * tensor<256x64xbf16> -> tensor<128x64xf32>
      %109 = arith.truncf %106 : tensor<128x64xf32> to tensor<128x64xbf16>
      %110 = tt.trans %109 {order = array<i32: 1, 0>} : tensor<128x64xbf16> -> tensor<64x128xbf16>
      %111 = tt.dot %110, %70, %arg15, inputPrecision = tf32 : tensor<64x128xbf16> * tensor<128x256xbf16> -> tensor<64x256xf32>
      %112 = tt.expand_dims %88 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32>
      %113 = tt.broadcast %112 : tensor<128x1xf32> -> tensor<128x64xf32>
      %114 = arith.subf %108, %113 : tensor<128x64xf32>
      %115 = arith.mulf %106, %114 : tensor<128x64xf32>
      %116 = arith.truncf %115 : tensor<128x64xf32> to tensor<128x64xbf16>
      %117 = tt.trans %116 {order = array<i32: 1, 0>} : tensor<128x64xbf16> -> tensor<64x128xbf16>
      %118 = tt.dot %117, %69, %arg14, inputPrecision = tf32 : tensor<64x128xbf16> * tensor<128x256xbf16> -> tensor<64x256xf32>
      scf.yield %118, %111 : tensor<64x256xf32>, tensor<64x256xf32>
    } {tt.num_stages = 1 : i32, tt.warp_specialize}
    %32 = tt.splat %12 : i32 -> tensor<64xi32>
    %33 = arith.cmpi slt, %21, %32 : tensor<64xi32>
    %34 = tt.splat %9 : i32 -> tensor<64xi32>
    %35 = arith.addi %34, %21 : tensor<64xi32>
    %36 = arith.extsi %35 : tensor<64xi32> to tensor<64xi64>
    %37 = arith.muli %36, %cst_1 : tensor<64xi64>
    %38 = arith.extsi %5 : i32 to i64
    %39 = tt.splat %38 : i64 -> tensor<64xi64>
    %40 = arith.addi %37, %39 : tensor<64xi64>
    %41 = arith.muli %40, %cst_0 : tensor<64xi64>
    %42 = tt.make_range {end = 256 : i32, start = 0 : i32} : tensor<256xi32>
    %43 = tt.expand_dims %33 {axis = 1 : i32} : tensor<64xi1> -> tensor<64x1xi1>
    %44 = tt.expand_dims %41 {axis = 1 : i32} : tensor<64xi64> -> tensor<64x1xi64>
    %45 = tt.splat %arg7 : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>>
    %46 = tt.addptr %45, %44 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi64>
    %47 = tt.expand_dims %42 {axis = 0 : i32} : tensor<256xi32> -> tensor<1x256xi32>
    %48 = tt.broadcast %46 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x256x!tt.ptr<bf16>>
    %49 = tt.broadcast %47 : tensor<1x256xi32> -> tensor<64x256xi32>
    %50 = tt.addptr %48, %49 : tensor<64x256x!tt.ptr<bf16>>, tensor<64x256xi32>
    %51 = tt.splat %arg10 : f32 -> tensor<64x256xf32>
    %52 = arith.mulf %31#0, %51 : tensor<64x256xf32>
    %53 = arith.truncf %52 : tensor<64x256xf32> to tensor<64x256xbf16>
    %54 = tt.broadcast %43 : tensor<64x1xi1> -> tensor<64x256xi1>
    tt.store %50, %53, %54 : tensor<64x256x!tt.ptr<bf16>>
    %55 = tt.splat %arg8 : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>>
    %56 = tt.addptr %55, %44 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi64>
    %57 = tt.broadcast %56 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x256x!tt.ptr<bf16>>
    %58 = tt.addptr %57, %49 : tensor<64x256x!tt.ptr<bf16>>, tensor<64x256xi32>
    %59 = arith.truncf %31#1 : tensor<64x256xf32> to tensor<64x256xbf16>
    tt.store %58, %59, %54 : tensor<64x256x!tt.ptr<bf16>>
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=8 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=3}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=3}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=3}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/sol_v1.py:81:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/sol_v1.py:81:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
{"KV_T": 1, "KV_S": 1, "KV_BM": 128, "KV_BN": 64, "KV_W": 8, "KV_WS": true, "Q_S": 1, "Q_BM": 128, "Q_BN": 64, "Q_W": 8, "Q_WS": true} s0: ERR PassManager::run failed
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv2(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: f32, %arg10: f32, %arg11: i32 {tt.divisibility = 16 : i32}, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<64x256xf32>
    %c63_i32 = arith.constant 63 : i32
    %cst_0 = arith.constant dense<256> : tensor<64xi64>
    %cst_1 = arith.constant dense<8> : tensor<64xi64>
    %cst_2 = arith.constant dense<0.000000e+00> : tensor<64x64xf32>
    %cst_3 = arith.constant dense<0.000000e+00> : tensor<64xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c256_i32 = arith.constant 256 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %c8_i32 = arith.constant 8 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c4096_i32 = arith.constant 4096 : i32
    %c4096_i64 = arith.constant 4096 : i64
    %c1_i64 = arith.constant 1 : i64
    %0 = tt.make_tensor_descriptor %arg0, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %1 = tt.make_tensor_descriptor %arg3, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %2 = tt.make_tensor_descriptor %arg1, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %3 = tt.make_tensor_descriptor %arg2, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
    %4 = tt.get_program_id x : i32
    %5 = arith.remsi %4, %c8_i32 : i32
    %6 = arith.divsi %4, %c8_i32 : i32
    %7 = tt.get_program_id y : i32
    %8 = tt.addptr %arg6, %6 : !tt.ptr<i32>, i32
    %9 = tt.load %8 : !tt.ptr<i32>
    %10 = tt.addptr %8, %c1_i32 : !tt.ptr<i32>, i32
    %11 = tt.load %10 : !tt.ptr<i32>
    %12 = arith.subi %11, %9 : i32
    %13 = arith.muli %7, %c64_i32 : i32
    %14 = arith.cmpi sge, %13, %12 : i32
    cf.cond_br %14, ^bb1, ^bb2
  ^bb1:  // pred: ^bb0
    tt.return
  ^bb2:  // pred: ^bb0
    %15 = arith.addi %9, %13 : i32
    %16 = arith.muli %5, %c256_i32 : i32
    %17 = tt.descriptor_load %2[%15, %16] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
    %18 = tt.descriptor_load %3[%15, %16] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
    %19 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
    %20 = tt.splat %13 : i32 -> tensor<64xi32>
    %21 = arith.addi %20, %19 : tensor<64xi32>
    %22 = arith.divsi %13, %c64_i32 : i32
    %23 = arith.muli %22, %c64_i32 : i32
    %24 = arith.cmpi sge, %arg12, %c0_i32 : i32
    %25 = scf.if %24 -> (i32) {
      %59 = arith.addi %13, %c64_i32 : i32
      %60 = arith.addi %59, %arg12 : i32
      %61 = arith.minsi %12, %60 : i32
      scf.yield %61 : i32
    } else {
      scf.yield %12 : i32
    }
    %26 = arith.subi %25, %23 : i32
    %27 = arith.addi %26, %c63_i32 : i32
    %28 = arith.divsi %27, %c64_i32 : i32
    %29 = arith.muli %28, %c2_i32 : i32
    %30:2 = scf.for %arg13 = %c0_i32 to %29 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<64x256xf32>, tensor<64x256xf32>)  : i32 {
      %59 = arith.divsi %arg13, %28 : i32
      %60 = arith.muli %59, %28 : i32
      %61 = arith.subi %arg13, %60 : i32
      %62 = arith.muli %61, %c64_i32 : i32
      %63 = arith.addi %23, %62 : i32
      %64 = arith.muli %5, %c2_i32 : i32
      %65 = arith.addi %64, %59 : i32
      %66 = arith.addi %9, %63 : i32
      %67 = arith.muli %65, %c256_i32 : i32
      %68 = tt.descriptor_load %0[%66, %67] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %69 = tt.descriptor_load %1[%66, %67] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %70 = tt.splat %63 : i32 -> tensor<64xi32>
      %71 = arith.addi %70, %19 : tensor<64xi32>
      %72 = tt.splat %12 : i32 -> tensor<64xi32>
      %73 = arith.cmpi slt, %71, %72 : tensor<64xi32>
      %74 = arith.extsi %65 : i32 to i64
      %75 = arith.extsi %arg11 : i32 to i64
      %76 = arith.muli %74, %75 : i64
      %77 = arith.extsi %9 : i32 to i64
      %78 = arith.addi %76, %77 : i64
      %79 = arith.extsi %71 : tensor<64xi32> to tensor<64xi64>
      %80 = tt.splat %78 : i64 -> tensor<64xi64>
      %81 = arith.addi %80, %79 : tensor<64xi64>
      %82 = tt.splat %arg4 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
      %83 = tt.addptr %82, %81 : tensor<64x!tt.ptr<f32>>, tensor<64xi64>
      %84 = tt.load %83, %73, %cst_3 : tensor<64x!tt.ptr<f32>>
      %85 = tt.splat %arg5 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
      %86 = tt.addptr %85, %81 : tensor<64x!tt.ptr<f32>>, tensor<64xi64>
      %87 = tt.load %86, %73, %cst_3 : tensor<64x!tt.ptr<f32>>
      %88 = tt.trans %17 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
      %89 = tt.dot %68, %88, %cst_2, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
      %90 = tt.expand_dims %21 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
      %91 = tt.expand_dims %71 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32>
      %92 = tt.broadcast %90 : tensor<1x64xi32> -> tensor<64x64xi32>
      %93 = tt.broadcast %91 : tensor<64x1xi32> -> tensor<64x64xi32>
      %94 = arith.cmpi sle, %92, %93 : tensor<64x64xi32>
      %95 = tt.expand_dims %73 {axis = 1 : i32} : tensor<64xi1> -> tensor<64x1xi1>
      %96 = tt.broadcast %95 : tensor<64x1xi1> -> tensor<64x64xi1>
      %97 = arith.andi %94, %96 : tensor<64x64xi1>
      %98 = scf.if %24 -> (tensor<64x64xi1>) {
        %118 = arith.subi %93, %92 : tensor<64x64xi32>
        %119 = tt.splat %arg12 : i32 -> tensor<64x64xi32>
        %120 = arith.cmpi sle, %118, %119 : tensor<64x64xi32>
        %121 = arith.andi %97, %120 : tensor<64x64xi1>
        scf.yield %121 : tensor<64x64xi1>
      } else {
        scf.yield %97 : tensor<64x64xi1>
      }
      %99 = tt.splat %arg9 : f32 -> tensor<64x64xf32>
      %100 = arith.mulf %89, %99 : tensor<64x64xf32>
      %101 = tt.expand_dims %84 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
      %102 = tt.broadcast %101 : tensor<64x1xf32> -> tensor<64x64xf32>
      %103 = arith.subf %100, %102 : tensor<64x64xf32>
      %104 = math.exp2 %103 : tensor<64x64xf32>
      %105 = arith.select %98, %104, %cst_2 : tensor<64x64xi1>, tensor<64x64xf32>
      %106 = tt.trans %18 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
      %107 = tt.dot %69, %106, %cst_2, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
      %108 = arith.truncf %105 : tensor<64x64xf32> to tensor<64x64xbf16>
      %109 = tt.trans %108 {order = array<i32: 1, 0>} : tensor<64x64xbf16> -> tensor<64x64xbf16>
      %110 = tt.dot %109, %69, %arg15, inputPrecision = tf32 : tensor<64x64xbf16> * tensor<64x256xbf16> -> tensor<64x256xf32>
      %111 = tt.expand_dims %87 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
      %112 = tt.broadcast %111 : tensor<64x1xf32> -> tensor<64x64xf32>
      %113 = arith.subf %107, %112 : tensor<64x64xf32>
      %114 = arith.mulf %105, %113 : tensor<64x64xf32>
      %115 = arith.truncf %114 : tensor<64x64xf32> to tensor<64x64xbf16>
      %116 = tt.trans %115 {order = array<i32: 1, 0>} : tensor<64x64xbf16> -> tensor<64x64xbf16>
      %117 = tt.dot %116, %68, %arg14, inputPrecision = tf32 : tensor<64x64xbf16> * tensor<64x256xbf16> -> tensor<64x256xf32>
      scf.yield %117, %110 : tensor<64x256xf32>, tensor<64x256xf32>
    } {tt.num_stages = 2 : i32, tt.warp_specialize}
    %31 = tt.splat %12 : i32 -> tensor<64xi32>
    %32 = arith.cmpi slt, %21, %31 : tensor<64xi32>
    %33 = tt.splat %9 : i32 -> tensor<64xi32>
    %34 = arith.addi %33, %21 : tensor<64xi32>
    %35 = arith.extsi %34 : tensor<64xi32> to tensor<64xi64>
    %36 = arith.muli %35, %cst_1 : tensor<64xi64>
    %37 = arith.extsi %5 : i32 to i64
    %38 = tt.splat %37 : i64 -> tensor<64xi64>
    %39 = arith.addi %36, %38 : tensor<64xi64>
    %40 = arith.muli %39, %cst_0 : tensor<64xi64>
    %41 = tt.make_range {end = 256 : i32, start = 0 : i32} : tensor<256xi32>
    %42 = tt.expand_dims %32 {axis = 1 : i32} : tensor<64xi1> -> tensor<64x1xi1>
    %43 = tt.expand_dims %40 {axis = 1 : i32} : tensor<64xi64> -> tensor<64x1xi64>
    %44 = tt.splat %arg7 : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>>
    %45 = tt.addptr %44, %43 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi64>
    %46 = tt.expand_dims %41 {axis = 0 : i32} : tensor<256xi32> -> tensor<1x256xi32>
    %47 = tt.broadcast %45 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x256x!tt.ptr<bf16>>
    %48 = tt.broadcast %46 : tensor<1x256xi32> -> tensor<64x256xi32>
    %49 = tt.addptr %47, %48 : tensor<64x256x!tt.ptr<bf16>>, tensor<64x256xi32>
    %50 = tt.splat %arg10 : f32 -> tensor<64x256xf32>
    %51 = arith.mulf %30#0, %50 : tensor<64x256xf32>
    %52 = arith.truncf %51 : tensor<64x256xf32> to tensor<64x256xbf16>
    %53 = tt.broadcast %42 : tensor<64x1xi1> -> tensor<64x256xi1>
    tt.store %49, %52, %53 : tensor<64x256x!tt.ptr<bf16>>
    %54 = tt.splat %arg8 : !tt.ptr<bf16> -> tensor<64x1x!tt.ptr<bf16>>
    %55 = tt.addptr %54, %43 : tensor<64x1x!tt.ptr<bf16>>, tensor<64x1xi64>
    %56 = tt.broadcast %55 : tensor<64x1x!tt.ptr<bf16>> -> tensor<64x256x!tt.ptr<bf16>>
    %57 = tt.addptr %56, %48 : tensor<64x256x!tt.ptr<bf16>>, tensor<64x256xi32>
    %58 = arith.truncf %30#1 : tensor<64x256xf32> to tensor<64x256xbf16>
    tt.store %57, %58, %53 : tensor<64x256x!tt.ptr<bf16>>
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=8 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=3}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=3}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=3}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/sol_v1.py:81:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/sol_v1.py:81:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
{"KV_T": 1, "KV_S": 2, "KV_BM": 64, "KV_BN": 64, "KV_W": 8, "KV_WS": true, "Q_S": 2, "Q_BM": 128, "Q_BN": 32, "Q_W": 8, "Q_WS": true} s0: ERR PassManager::run failed
