python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv_kernel(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: f32, %arg10: f32, %arg11: i32 {tt.divisibility = 16 : i32}, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<256x64xf32>
    %c127_i32 = arith.constant 127 : i32
    %cst_0 = arith.constant dense<256> : tensor<64xi64>
    %cst_1 = arith.constant dense<8> : tensor<64xi64>
    %cst_2 = arith.constant dense<0.000000e+00> : tensor<128x64xf32>
    %cst_3 = arith.constant dense<0.000000e+00> : tensor<128xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c128_i32 = arith.constant 128 : i32
    %c256_i32 = arith.constant 256 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c1_i64 = arith.constant 1 : i64
    %c4096_i64 = arith.constant 4096 : i64
    %c4096_i32 = arith.constant 4096 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %0 = tt.get_program_id x : i32
    %1 = tt.get_program_id y : i32
    %2 = tt.get_program_id z : i32
    %3 = tt.addptr %arg6, %1 : !tt.ptr<i32>, i32
    %4 = tt.load %3 : !tt.ptr<i32>
    %5 = tt.addptr %3, %c1_i32 : !tt.ptr<i32>, i32
    %6 = tt.load %5 : !tt.ptr<i32>
    %7 = arith.subi %6, %4 : i32
    %8 = arith.muli %2, %c64_i32 : i32
    %9 = arith.cmpi slt, %8, %7 : i32
    scf.if %9 {
      %10 = tt.make_tensor_descriptor %arg0, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<128x256xbf16>>
      %11 = tt.make_tensor_descriptor %arg3, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<128x256xbf16>>
      %12 = tt.make_tensor_descriptor %arg1, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %13 = tt.make_tensor_descriptor %arg2, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %14 = arith.addi %4, %8 : i32
      %15 = arith.muli %0, %c256_i32 : i32
      %16 = tt.descriptor_load %12[%14, %15] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %17 = tt.descriptor_load %13[%14, %15] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %18 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
      %19 = tt.splat %8 : i32 -> tensor<64xi32>
      %20 = arith.addi %19, %18 : tensor<64xi32>
      %21 = arith.divsi %8, %c128_i32 : i32
      %22 = arith.muli %21, %c128_i32 : i32
      %23 = arith.cmpi sge, %arg12, %c0_i32 : i32
      %24 = scf.if %23 -> (i32) {
        %58 = arith.addi %8, %c64_i32 : i32
        %59 = arith.addi %58, %arg12 : i32
        %60 = arith.minsi %7, %59 : i32
        scf.yield %60 : i32
      } else {
        scf.yield %7 : i32
      }
      %25 = arith.subi %24, %22 : i32
      %26 = arith.addi %25, %c127_i32 : i32
      %27 = arith.divsi %26, %c128_i32 : i32
      %28 = arith.muli %27, %c2_i32 : i32
      %29:2 = scf.for %arg13 = %c0_i32 to %28 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<256x64xf32>, tensor<256x64xf32>)  : i32 {
        %58 = arith.divsi %arg13, %27 : i32
        %59 = arith.muli %58, %27 : i32
        %60 = arith.subi %arg13, %59 : i32
        %61 = arith.muli %60, %c128_i32 : i32
        %62 = arith.addi %22, %61 : i32
        %63 = arith.muli %0, %c2_i32 : i32
        %64 = arith.addi %63, %58 : i32
        %65 = arith.addi %4, %62 : i32
        %66 = arith.muli %64, %c256_i32 : i32
        %67 = tt.descriptor_load %10[%65, %66] : !tt.tensordesc<tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %68 = tt.descriptor_load %11[%65, %66] : !tt.tensordesc<tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %69 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32>
        %70 = tt.splat %62 : i32 -> tensor<128xi32>
        %71 = arith.addi %70, %69 : tensor<128xi32>
        %72 = tt.splat %7 : i32 -> tensor<128xi32>
        %73 = arith.cmpi slt, %71, %72 : tensor<128xi32>
        %74 = arith.muli %64, %arg11 : i32
        %75 = tt.addptr %arg4, %74 : !tt.ptr<f32>, i32
        %76 = tt.addptr %75, %4 : !tt.ptr<f32>, i32
        %77 = tt.splat %76 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>>
        %78 = tt.addptr %77, %71 : tensor<128x!tt.ptr<f32>>, tensor<128xi32>
        %79 = tt.load %78, %73, %cst_3 : tensor<128x!tt.ptr<f32>>
        %80 = tt.addptr %arg5, %74 : !tt.ptr<f32>, i32
        %81 = tt.addptr %80, %4 : !tt.ptr<f32>, i32
        %82 = tt.splat %81 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>>
        %83 = tt.addptr %82, %71 : tensor<128x!tt.ptr<f32>>, tensor<128xi32>
        %84 = tt.load %83, %73, %cst_3 : tensor<128x!tt.ptr<f32>>
        %85 = tt.trans %16 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %86 = tt.dot %67, %85, %cst_2, inputPrecision = tf32 : tensor<128x256xbf16> * tensor<256x64xbf16> -> tensor<128x64xf32>
        %87 = tt.splat %arg9 : f32 -> tensor<128x64xf32>
        %88 = arith.mulf %86, %87 : tensor<128x64xf32>
        %89 = tt.expand_dims %79 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32>
        %90 = tt.broadcast %89 : tensor<128x1xf32> -> tensor<128x64xf32>
        %91 = arith.subf %88, %90 : tensor<128x64xf32>
        %92 = math.exp2 %91 : tensor<128x64xf32>
        %93 = tt.expand_dims %71 {axis = 1 : i32} : tensor<128xi32> -> tensor<128x1xi32>
        %94 = tt.expand_dims %20 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
        %95 = tt.broadcast %93 : tensor<128x1xi32> -> tensor<128x64xi32>
        %96 = tt.broadcast %94 : tensor<1x64xi32> -> tensor<128x64xi32>
        %97 = arith.cmpi sge, %95, %96 : tensor<128x64xi32>
        %98 = tt.expand_dims %73 {axis = 1 : i32} : tensor<128xi1> -> tensor<128x1xi1>
        %99 = tt.broadcast %98 : tensor<128x1xi1> -> tensor<128x64xi1>
        %100 = arith.andi %97, %99 : tensor<128x64xi1>
        %101 = scf.if %23 -> (tensor<128x64xi1>) {
          %115 = arith.subi %95, %96 : tensor<128x64xi32>
          %116 = tt.splat %arg12 : i32 -> tensor<128x64xi32>
          %117 = arith.cmpi sle, %115, %116 : tensor<128x64xi32>
          %118 = arith.andi %100, %117 : tensor<128x64xi1>
          scf.yield %118 : tensor<128x64xi1>
        } else {
          scf.yield %100 : tensor<128x64xi1>
        }
        %102 = arith.select %101, %92, %cst_2 : tensor<128x64xi1>, tensor<128x64xf32>
        %103 = tt.trans %17 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %104 = tt.dot %68, %103, %cst_2, inputPrecision = tf32 : tensor<128x256xbf16> * tensor<256x64xbf16> -> tensor<128x64xf32>
        %105 = tt.expand_dims %84 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32>
        %106 = tt.broadcast %105 : tensor<128x1xf32> -> tensor<128x64xf32>
        %107 = arith.subf %104, %106 : tensor<128x64xf32>
        %108 = arith.mulf %102, %107 : tensor<128x64xf32>
        %109 = tt.trans %68 {order = array<i32: 1, 0>} : tensor<128x256xbf16> -> tensor<256x128xbf16>
        %110 = arith.truncf %102 : tensor<128x64xf32> to tensor<128x64xbf16>
        %111 = tt.dot %109, %110, %arg15, inputPrecision = tf32 : tensor<256x128xbf16> * tensor<128x64xbf16> -> tensor<256x64xf32>
        %112 = tt.trans %67 {order = array<i32: 1, 0>} : tensor<128x256xbf16> -> tensor<256x128xbf16>
        %113 = arith.truncf %108 : tensor<128x64xf32> to tensor<128x64xbf16>
        %114 = tt.dot %112, %113, %arg14, inputPrecision = tf32 : tensor<256x128xbf16> * tensor<128x64xbf16> -> tensor<256x64xf32>
        scf.yield %114, %111 : tensor<256x64xf32>, tensor<256x64xf32>
      } {tt.num_stages = 1 : i32, tt.warp_specialize}
      %30 = tt.make_range {end = 256 : i32, start = 0 : i32} : tensor<256xi32>
      %31 = tt.splat %7 : i32 -> tensor<64xi32>
      %32 = arith.cmpi slt, %20, %31 : tensor<64xi32>
      %33 = tt.splat %4 : i32 -> tensor<64xi32>
      %34 = arith.addi %33, %20 : tensor<64xi32>
      %35 = arith.extsi %34 : tensor<64xi32> to tensor<64xi64>
      %36 = arith.muli %35, %cst_1 : tensor<64xi64>
      %37 = arith.extsi %0 : i32 to i64
      %38 = tt.splat %37 : i64 -> tensor<64xi64>
      %39 = arith.addi %36, %38 : tensor<64xi64>
      %40 = arith.muli %39, %cst_0 : tensor<64xi64>
      %41 = tt.expand_dims %32 {axis = 0 : i32} : tensor<64xi1> -> tensor<1x64xi1>
      %42 = tt.expand_dims %40 {axis = 0 : i32} : tensor<64xi64> -> tensor<1x64xi64>
      %43 = tt.splat %arg7 : !tt.ptr<bf16> -> tensor<1x64x!tt.ptr<bf16>>
      %44 = tt.addptr %43, %42 : tensor<1x64x!tt.ptr<bf16>>, tensor<1x64xi64>
      %45 = tt.expand_dims %30 {axis = 1 : i32} : tensor<256xi32> -> tensor<256x1xi32>
      %46 = tt.broadcast %44 : tensor<1x64x!tt.ptr<bf16>> -> tensor<256x64x!tt.ptr<bf16>>
      %47 = tt.broadcast %45 : tensor<256x1xi32> -> tensor<256x64xi32>
      %48 = tt.addptr %46, %47 : tensor<256x64x!tt.ptr<bf16>>, tensor<256x64xi32>
      %49 = tt.splat %arg10 : f32 -> tensor<256x64xf32>
      %50 = arith.mulf %29#0, %49 : tensor<256x64xf32>
      %51 = arith.truncf %50 : tensor<256x64xf32> to tensor<256x64xbf16>
      %52 = tt.broadcast %41 : tensor<1x64xi1> -> tensor<256x64xi1>
      tt.store %48, %51, %52 : tensor<256x64x!tt.ptr<bf16>>
      %53 = tt.splat %arg8 : !tt.ptr<bf16> -> tensor<1x64x!tt.ptr<bf16>>
      %54 = tt.addptr %53, %42 : tensor<1x64x!tt.ptr<bf16>>, tensor<1x64xi64>
      %55 = tt.broadcast %54 : tensor<1x64x!tt.ptr<bf16>> -> tensor<256x64x!tt.ptr<bf16>>
      %56 = tt.addptr %55, %47 : tensor<256x64x!tt.ptr<bf16>>, tensor<256x64xi32>
      %57 = arith.truncf %29#1 : tensor<256x64xf32> to tensor<256x64xbf16>
      tt.store %56, %57, %52 : tensor<256x64x!tt.ptr<bf16>>
    }
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=4 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=3}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=3}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=3}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/scratch/v2.py:74:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/scratch/v2.py:74:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
[128, 64, 4, True, 1] ERR PassManager::run failed
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv_kernel(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: f32, %arg10: f32, %arg11: i32 {tt.divisibility = 16 : i32}, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<256x64xf32>
    %c127_i32 = arith.constant 127 : i32
    %cst_0 = arith.constant dense<256> : tensor<64xi64>
    %cst_1 = arith.constant dense<8> : tensor<64xi64>
    %cst_2 = arith.constant dense<0.000000e+00> : tensor<128x64xf32>
    %cst_3 = arith.constant dense<0.000000e+00> : tensor<128xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c128_i32 = arith.constant 128 : i32
    %c256_i32 = arith.constant 256 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c1_i64 = arith.constant 1 : i64
    %c4096_i64 = arith.constant 4096 : i64
    %c4096_i32 = arith.constant 4096 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %0 = tt.get_program_id x : i32
    %1 = tt.get_program_id y : i32
    %2 = tt.get_program_id z : i32
    %3 = tt.addptr %arg6, %1 : !tt.ptr<i32>, i32
    %4 = tt.load %3 : !tt.ptr<i32>
    %5 = tt.addptr %3, %c1_i32 : !tt.ptr<i32>, i32
    %6 = tt.load %5 : !tt.ptr<i32>
    %7 = arith.subi %6, %4 : i32
    %8 = arith.muli %2, %c64_i32 : i32
    %9 = arith.cmpi slt, %8, %7 : i32
    scf.if %9 {
      %10 = tt.make_tensor_descriptor %arg0, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<128x256xbf16>>
      %11 = tt.make_tensor_descriptor %arg3, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<128x256xbf16>>
      %12 = tt.make_tensor_descriptor %arg1, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %13 = tt.make_tensor_descriptor %arg2, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %14 = arith.addi %4, %8 : i32
      %15 = arith.muli %0, %c256_i32 : i32
      %16 = tt.descriptor_load %12[%14, %15] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %17 = tt.descriptor_load %13[%14, %15] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %18 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
      %19 = tt.splat %8 : i32 -> tensor<64xi32>
      %20 = arith.addi %19, %18 : tensor<64xi32>
      %21 = arith.divsi %8, %c128_i32 : i32
      %22 = arith.muli %21, %c128_i32 : i32
      %23 = arith.cmpi sge, %arg12, %c0_i32 : i32
      %24 = scf.if %23 -> (i32) {
        %58 = arith.addi %8, %c64_i32 : i32
        %59 = arith.addi %58, %arg12 : i32
        %60 = arith.minsi %7, %59 : i32
        scf.yield %60 : i32
      } else {
        scf.yield %7 : i32
      }
      %25 = arith.subi %24, %22 : i32
      %26 = arith.addi %25, %c127_i32 : i32
      %27 = arith.divsi %26, %c128_i32 : i32
      %28 = arith.muli %27, %c2_i32 : i32
      %29:2 = scf.for %arg13 = %c0_i32 to %28 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<256x64xf32>, tensor<256x64xf32>)  : i32 {
        %58 = arith.divsi %arg13, %27 : i32
        %59 = arith.muli %58, %27 : i32
        %60 = arith.subi %arg13, %59 : i32
        %61 = arith.muli %60, %c128_i32 : i32
        %62 = arith.addi %22, %61 : i32
        %63 = arith.muli %0, %c2_i32 : i32
        %64 = arith.addi %63, %58 : i32
        %65 = arith.addi %4, %62 : i32
        %66 = arith.muli %64, %c256_i32 : i32
        %67 = tt.descriptor_load %10[%65, %66] : !tt.tensordesc<tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %68 = tt.descriptor_load %11[%65, %66] : !tt.tensordesc<tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %69 = tt.make_range {end = 128 : i32, start = 0 : i32} : tensor<128xi32>
        %70 = tt.splat %62 : i32 -> tensor<128xi32>
        %71 = arith.addi %70, %69 : tensor<128xi32>
        %72 = tt.splat %7 : i32 -> tensor<128xi32>
        %73 = arith.cmpi slt, %71, %72 : tensor<128xi32>
        %74 = arith.muli %64, %arg11 : i32
        %75 = tt.addptr %arg4, %74 : !tt.ptr<f32>, i32
        %76 = tt.addptr %75, %4 : !tt.ptr<f32>, i32
        %77 = tt.splat %76 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>>
        %78 = tt.addptr %77, %71 : tensor<128x!tt.ptr<f32>>, tensor<128xi32>
        %79 = tt.load %78, %73, %cst_3 : tensor<128x!tt.ptr<f32>>
        %80 = tt.addptr %arg5, %74 : !tt.ptr<f32>, i32
        %81 = tt.addptr %80, %4 : !tt.ptr<f32>, i32
        %82 = tt.splat %81 : !tt.ptr<f32> -> tensor<128x!tt.ptr<f32>>
        %83 = tt.addptr %82, %71 : tensor<128x!tt.ptr<f32>>, tensor<128xi32>
        %84 = tt.load %83, %73, %cst_3 : tensor<128x!tt.ptr<f32>>
        %85 = tt.trans %16 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %86 = tt.dot %67, %85, %cst_2, inputPrecision = tf32 : tensor<128x256xbf16> * tensor<256x64xbf16> -> tensor<128x64xf32>
        %87 = tt.splat %arg9 : f32 -> tensor<128x64xf32>
        %88 = arith.mulf %86, %87 : tensor<128x64xf32>
        %89 = tt.expand_dims %79 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32>
        %90 = tt.broadcast %89 : tensor<128x1xf32> -> tensor<128x64xf32>
        %91 = arith.subf %88, %90 : tensor<128x64xf32>
        %92 = math.exp2 %91 : tensor<128x64xf32>
        %93 = tt.expand_dims %71 {axis = 1 : i32} : tensor<128xi32> -> tensor<128x1xi32>
        %94 = tt.expand_dims %20 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
        %95 = tt.broadcast %93 : tensor<128x1xi32> -> tensor<128x64xi32>
        %96 = tt.broadcast %94 : tensor<1x64xi32> -> tensor<128x64xi32>
        %97 = arith.cmpi sge, %95, %96 : tensor<128x64xi32>
        %98 = tt.expand_dims %73 {axis = 1 : i32} : tensor<128xi1> -> tensor<128x1xi1>
        %99 = tt.broadcast %98 : tensor<128x1xi1> -> tensor<128x64xi1>
        %100 = arith.andi %97, %99 : tensor<128x64xi1>
        %101 = scf.if %23 -> (tensor<128x64xi1>) {
          %115 = arith.subi %95, %96 : tensor<128x64xi32>
          %116 = tt.splat %arg12 : i32 -> tensor<128x64xi32>
          %117 = arith.cmpi sle, %115, %116 : tensor<128x64xi32>
          %118 = arith.andi %100, %117 : tensor<128x64xi1>
          scf.yield %118 : tensor<128x64xi1>
        } else {
          scf.yield %100 : tensor<128x64xi1>
        }
        %102 = arith.select %101, %92, %cst_2 : tensor<128x64xi1>, tensor<128x64xf32>
        %103 = tt.trans %17 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %104 = tt.dot %68, %103, %cst_2, inputPrecision = tf32 : tensor<128x256xbf16> * tensor<256x64xbf16> -> tensor<128x64xf32>
        %105 = tt.expand_dims %84 {axis = 1 : i32} : tensor<128xf32> -> tensor<128x1xf32>
        %106 = tt.broadcast %105 : tensor<128x1xf32> -> tensor<128x64xf32>
        %107 = arith.subf %104, %106 : tensor<128x64xf32>
        %108 = arith.mulf %102, %107 : tensor<128x64xf32>
        %109 = tt.trans %68 {order = array<i32: 1, 0>} : tensor<128x256xbf16> -> tensor<256x128xbf16>
        %110 = arith.truncf %102 : tensor<128x64xf32> to tensor<128x64xbf16>
        %111 = tt.dot %109, %110, %arg15, inputPrecision = tf32 : tensor<256x128xbf16> * tensor<128x64xbf16> -> tensor<256x64xf32>
        %112 = tt.trans %67 {order = array<i32: 1, 0>} : tensor<128x256xbf16> -> tensor<256x128xbf16>
        %113 = arith.truncf %108 : tensor<128x64xf32> to tensor<128x64xbf16>
        %114 = tt.dot %112, %113, %arg14, inputPrecision = tf32 : tensor<256x128xbf16> * tensor<128x64xbf16> -> tensor<256x64xf32>
        scf.yield %114, %111 : tensor<256x64xf32>, tensor<256x64xf32>
      } {tt.num_stages = 1 : i32, tt.warp_specialize}
      %30 = tt.make_range {end = 256 : i32, start = 0 : i32} : tensor<256xi32>
      %31 = tt.splat %7 : i32 -> tensor<64xi32>
      %32 = arith.cmpi slt, %20, %31 : tensor<64xi32>
      %33 = tt.splat %4 : i32 -> tensor<64xi32>
      %34 = arith.addi %33, %20 : tensor<64xi32>
      %35 = arith.extsi %34 : tensor<64xi32> to tensor<64xi64>
      %36 = arith.muli %35, %cst_1 : tensor<64xi64>
      %37 = arith.extsi %0 : i32 to i64
      %38 = tt.splat %37 : i64 -> tensor<64xi64>
      %39 = arith.addi %36, %38 : tensor<64xi64>
      %40 = arith.muli %39, %cst_0 : tensor<64xi64>
      %41 = tt.expand_dims %32 {axis = 0 : i32} : tensor<64xi1> -> tensor<1x64xi1>
      %42 = tt.expand_dims %40 {axis = 0 : i32} : tensor<64xi64> -> tensor<1x64xi64>
      %43 = tt.splat %arg7 : !tt.ptr<bf16> -> tensor<1x64x!tt.ptr<bf16>>
      %44 = tt.addptr %43, %42 : tensor<1x64x!tt.ptr<bf16>>, tensor<1x64xi64>
      %45 = tt.expand_dims %30 {axis = 1 : i32} : tensor<256xi32> -> tensor<256x1xi32>
      %46 = tt.broadcast %44 : tensor<1x64x!tt.ptr<bf16>> -> tensor<256x64x!tt.ptr<bf16>>
      %47 = tt.broadcast %45 : tensor<256x1xi32> -> tensor<256x64xi32>
      %48 = tt.addptr %46, %47 : tensor<256x64x!tt.ptr<bf16>>, tensor<256x64xi32>
      %49 = tt.splat %arg10 : f32 -> tensor<256x64xf32>
      %50 = arith.mulf %29#0, %49 : tensor<256x64xf32>
      %51 = arith.truncf %50 : tensor<256x64xf32> to tensor<256x64xbf16>
      %52 = tt.broadcast %41 : tensor<1x64xi1> -> tensor<256x64xi1>
      tt.store %48, %51, %52 : tensor<256x64x!tt.ptr<bf16>>
      %53 = tt.splat %arg8 : !tt.ptr<bf16> -> tensor<1x64x!tt.ptr<bf16>>
      %54 = tt.addptr %53, %42 : tensor<1x64x!tt.ptr<bf16>>, tensor<1x64xi64>
      %55 = tt.broadcast %54 : tensor<1x64x!tt.ptr<bf16>> -> tensor<256x64x!tt.ptr<bf16>>
      %56 = tt.addptr %55, %47 : tensor<256x64x!tt.ptr<bf16>>, tensor<256x64xi32>
      %57 = arith.truncf %29#1 : tensor<256x64xf32> to tensor<256x64xbf16>
      tt.store %56, %57, %52 : tensor<256x64x!tt.ptr<bf16>>
    }
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=8 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=3}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=3}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=3}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/scratch/v2.py:74:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/scratch/v2.py:74:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
[128, 64, 8, True, 1] ERR PassManager::run failed
[128, 64, 8, False, 1] {'_prep': 30.0, '_dq_kernel': 1533.0, '_dkdv_kernel': 2225.6}
[64, 64, 4, False, 2] ERR out of resource: shared memory, Required: 279136, Hardware limit: 232448. Reducing block sizes or `num_stages` may help.
python: /__w/triton/triton/llvm-project/llvm/include/llvm/Support/Casting.h:650: decltype(auto) llvm::dyn_cast(From &) [To = mlir::DenseArrayAttr, From = mlir::Attribute]: Assertion `detail::isPresent(Val) && "dyn_cast on a non-existent value"' failed.
module {
  tt.func public @_dkdv_kernel(%arg0: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<i32> {tt.divisibility = 16 : i32}, %arg7: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg8: !tt.ptr<bf16> {tt.divisibility = 16 : i32}, %arg9: f32, %arg10: f32, %arg11: i32 {tt.divisibility = 16 : i32}, %arg12: i32) attributes {noinline = false} {
    %cst = arith.constant dense<0.000000e+00> : tensor<256x64xf32>
    %c63_i32 = arith.constant 63 : i32
    %cst_0 = arith.constant dense<256> : tensor<64xi64>
    %cst_1 = arith.constant dense<8> : tensor<64xi64>
    %cst_2 = arith.constant dense<0.000000e+00> : tensor<64x64xf32>
    %cst_3 = arith.constant dense<0.000000e+00> : tensor<64xf32>
    %c2_i32 = arith.constant 2 : i32
    %c0_i32 = arith.constant 0 : i32
    %c256_i32 = arith.constant 256 : i32
    %c2048_i64 = arith.constant 2048 : i64
    %c2048_i32 = arith.constant 2048 : i32
    %c1_i64 = arith.constant 1 : i64
    %c4096_i64 = arith.constant 4096 : i64
    %c4096_i32 = arith.constant 4096 : i32
    %c64_i32 = arith.constant 64 : i32
    %c1_i32 = arith.constant 1 : i32
    %0 = tt.get_program_id x : i32
    %1 = tt.get_program_id y : i32
    %2 = tt.get_program_id z : i32
    %3 = tt.addptr %arg6, %1 : !tt.ptr<i32>, i32
    %4 = tt.load %3 : !tt.ptr<i32>
    %5 = tt.addptr %3, %c1_i32 : !tt.ptr<i32>, i32
    %6 = tt.load %5 : !tt.ptr<i32>
    %7 = arith.subi %6, %4 : i32
    %8 = arith.muli %2, %c64_i32 : i32
    %9 = arith.cmpi slt, %8, %7 : i32
    scf.if %9 {
      %10 = tt.make_tensor_descriptor %arg0, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %11 = tt.make_tensor_descriptor %arg3, [%arg11, %c4096_i32], [%c4096_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %12 = tt.make_tensor_descriptor %arg1, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %13 = tt.make_tensor_descriptor %arg2, [%arg11, %c2048_i32], [%c2048_i64, %c1_i64] : <bf16>, <tensor<64x256xbf16>>
      %14 = arith.addi %4, %8 : i32
      %15 = arith.muli %0, %c256_i32 : i32
      %16 = tt.descriptor_load %12[%14, %15] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %17 = tt.descriptor_load %13[%14, %15] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
      %18 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
      %19 = tt.splat %8 : i32 -> tensor<64xi32>
      %20 = arith.addi %19, %18 : tensor<64xi32>
      %21 = arith.divsi %8, %c64_i32 : i32
      %22 = arith.muli %21, %c64_i32 : i32
      %23 = arith.cmpi sge, %arg12, %c0_i32 : i32
      %24 = scf.if %23 -> (i32) {
        %58 = arith.addi %8, %c64_i32 : i32
        %59 = arith.addi %58, %arg12 : i32
        %60 = arith.minsi %7, %59 : i32
        scf.yield %60 : i32
      } else {
        scf.yield %7 : i32
      }
      %25 = arith.subi %24, %22 : i32
      %26 = arith.addi %25, %c63_i32 : i32
      %27 = arith.divsi %26, %c64_i32 : i32
      %28 = arith.muli %27, %c2_i32 : i32
      %29:2 = scf.for %arg13 = %c0_i32 to %28 step %c1_i32 iter_args(%arg14 = %cst, %arg15 = %cst) -> (tensor<256x64xf32>, tensor<256x64xf32>)  : i32 {
        %58 = arith.divsi %arg13, %27 : i32
        %59 = arith.muli %58, %27 : i32
        %60 = arith.subi %arg13, %59 : i32
        %61 = arith.muli %60, %c64_i32 : i32
        %62 = arith.addi %22, %61 : i32
        %63 = arith.muli %0, %c2_i32 : i32
        %64 = arith.addi %63, %58 : i32
        %65 = arith.addi %4, %62 : i32
        %66 = arith.muli %64, %c256_i32 : i32
        %67 = tt.descriptor_load %10[%65, %66] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %68 = tt.descriptor_load %11[%65, %66] : !tt.tensordesc<tensor<64x256xbf16>> -> tensor<64x256xbf16>
        %69 = tt.splat %62 : i32 -> tensor<64xi32>
        %70 = arith.addi %69, %18 : tensor<64xi32>
        %71 = tt.splat %7 : i32 -> tensor<64xi32>
        %72 = arith.cmpi slt, %70, %71 : tensor<64xi32>
        %73 = arith.muli %64, %arg11 : i32
        %74 = tt.addptr %arg4, %73 : !tt.ptr<f32>, i32
        %75 = tt.addptr %74, %4 : !tt.ptr<f32>, i32
        %76 = tt.splat %75 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %77 = tt.addptr %76, %70 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %78 = tt.load %77, %72, %cst_3 : tensor<64x!tt.ptr<f32>>
        %79 = tt.addptr %arg5, %73 : !tt.ptr<f32>, i32
        %80 = tt.addptr %79, %4 : !tt.ptr<f32>, i32
        %81 = tt.splat %80 : !tt.ptr<f32> -> tensor<64x!tt.ptr<f32>>
        %82 = tt.addptr %81, %70 : tensor<64x!tt.ptr<f32>>, tensor<64xi32>
        %83 = tt.load %82, %72, %cst_3 : tensor<64x!tt.ptr<f32>>
        %84 = tt.trans %16 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %85 = tt.dot %67, %84, %cst_2, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %86 = tt.splat %arg9 : f32 -> tensor<64x64xf32>
        %87 = arith.mulf %85, %86 : tensor<64x64xf32>
        %88 = tt.expand_dims %78 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %89 = tt.broadcast %88 : tensor<64x1xf32> -> tensor<64x64xf32>
        %90 = arith.subf %87, %89 : tensor<64x64xf32>
        %91 = math.exp2 %90 : tensor<64x64xf32>
        %92 = tt.expand_dims %70 {axis = 1 : i32} : tensor<64xi32> -> tensor<64x1xi32>
        %93 = tt.expand_dims %20 {axis = 0 : i32} : tensor<64xi32> -> tensor<1x64xi32>
        %94 = tt.broadcast %92 : tensor<64x1xi32> -> tensor<64x64xi32>
        %95 = tt.broadcast %93 : tensor<1x64xi32> -> tensor<64x64xi32>
        %96 = arith.cmpi sge, %94, %95 : tensor<64x64xi32>
        %97 = tt.expand_dims %72 {axis = 1 : i32} : tensor<64xi1> -> tensor<64x1xi1>
        %98 = tt.broadcast %97 : tensor<64x1xi1> -> tensor<64x64xi1>
        %99 = arith.andi %96, %98 : tensor<64x64xi1>
        %100 = scf.if %23 -> (tensor<64x64xi1>) {
          %114 = arith.subi %94, %95 : tensor<64x64xi32>
          %115 = tt.splat %arg12 : i32 -> tensor<64x64xi32>
          %116 = arith.cmpi sle, %114, %115 : tensor<64x64xi32>
          %117 = arith.andi %99, %116 : tensor<64x64xi1>
          scf.yield %117 : tensor<64x64xi1>
        } else {
          scf.yield %99 : tensor<64x64xi1>
        }
        %101 = arith.select %100, %91, %cst_2 : tensor<64x64xi1>, tensor<64x64xf32>
        %102 = tt.trans %17 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %103 = tt.dot %68, %102, %cst_2, inputPrecision = tf32 : tensor<64x256xbf16> * tensor<256x64xbf16> -> tensor<64x64xf32>
        %104 = tt.expand_dims %83 {axis = 1 : i32} : tensor<64xf32> -> tensor<64x1xf32>
        %105 = tt.broadcast %104 : tensor<64x1xf32> -> tensor<64x64xf32>
        %106 = arith.subf %103, %105 : tensor<64x64xf32>
        %107 = arith.mulf %101, %106 : tensor<64x64xf32>
        %108 = tt.trans %68 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %109 = arith.truncf %101 : tensor<64x64xf32> to tensor<64x64xbf16>
        %110 = tt.dot %108, %109, %arg15, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        %111 = tt.trans %67 {order = array<i32: 1, 0>} : tensor<64x256xbf16> -> tensor<256x64xbf16>
        %112 = arith.truncf %107 : tensor<64x64xf32> to tensor<64x64xbf16>
        %113 = tt.dot %111, %112, %arg14, inputPrecision = tf32 : tensor<256x64xbf16> * tensor<64x64xbf16> -> tensor<256x64xf32>
        scf.yield %113, %110 : tensor<256x64xf32>, tensor<256x64xf32>
      } {tt.num_stages = 2 : i32, tt.warp_specialize}
      %30 = tt.make_range {end = 256 : i32, start = 0 : i32} : tensor<256xi32>
      %31 = tt.splat %7 : i32 -> tensor<64xi32>
      %32 = arith.cmpi slt, %20, %31 : tensor<64xi32>
      %33 = tt.splat %4 : i32 -> tensor<64xi32>
      %34 = arith.addi %33, %20 : tensor<64xi32>
      %35 = arith.extsi %34 : tensor<64xi32> to tensor<64xi64>
      %36 = arith.muli %35, %cst_1 : tensor<64xi64>
      %37 = arith.extsi %0 : i32 to i64
      %38 = tt.splat %37 : i64 -> tensor<64xi64>
      %39 = arith.addi %36, %38 : tensor<64xi64>
      %40 = arith.muli %39, %cst_0 : tensor<64xi64>
      %41 = tt.expand_dims %32 {axis = 0 : i32} : tensor<64xi1> -> tensor<1x64xi1>
      %42 = tt.expand_dims %40 {axis = 0 : i32} : tensor<64xi64> -> tensor<1x64xi64>
      %43 = tt.splat %arg7 : !tt.ptr<bf16> -> tensor<1x64x!tt.ptr<bf16>>
      %44 = tt.addptr %43, %42 : tensor<1x64x!tt.ptr<bf16>>, tensor<1x64xi64>
      %45 = tt.expand_dims %30 {axis = 1 : i32} : tensor<256xi32> -> tensor<256x1xi32>
      %46 = tt.broadcast %44 : tensor<1x64x!tt.ptr<bf16>> -> tensor<256x64x!tt.ptr<bf16>>
      %47 = tt.broadcast %45 : tensor<256x1xi32> -> tensor<256x64xi32>
      %48 = tt.addptr %46, %47 : tensor<256x64x!tt.ptr<bf16>>, tensor<256x64xi32>
      %49 = tt.splat %arg10 : f32 -> tensor<256x64xf32>
      %50 = arith.mulf %29#0, %49 : tensor<256x64xf32>
      %51 = arith.truncf %50 : tensor<256x64xf32> to tensor<256x64xbf16>
      %52 = tt.broadcast %41 : tensor<1x64xi1> -> tensor<256x64xi1>
      tt.store %48, %51, %52 : tensor<256x64x!tt.ptr<bf16>>
      %53 = tt.splat %arg8 : !tt.ptr<bf16> -> tensor<1x64x!tt.ptr<bf16>>
      %54 = tt.addptr %53, %42 : tensor<1x64x!tt.ptr<bf16>>, tensor<1x64xi64>
      %55 = tt.broadcast %54 : tensor<1x64x!tt.ptr<bf16>> -> tensor<256x64x!tt.ptr<bf16>>
      %56 = tt.addptr %55, %47 : tensor<256x64x!tt.ptr<bf16>>, tensor<256x64xi32>
      %57 = arith.truncf %29#1 : tensor<256x64xf32> to tensor<256x64xbf16>
      tt.store %56, %57, %52 : tensor<256x64x!tt.ptr<bf16>>
    }
    tt.return
  }
}

{-#
  external_resources: {
    mlir_reproducer: {
      pipeline: "builtin.module(convert-triton-to-tritongpu{enable-source-remat=false num-ctas=1 num-warps=4 target=cuda:103 threads-per-warp=32}, tritongpu-coalesce, tritongpu-F32DotTC{emu-tf32=true}, triton-nvidia-gpu-plan-cta, tritongpu-remove-layout-conversions, tritongpu-optimize-thread-locality, tritongpu-accelerate-matmul, tritongpu-remove-layout-conversions, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, triton-nvidia-optimize-descriptor-encoding, triton-loop-aware-cse, tritongpu-fuse-nested-loops, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-licm, tritongpu-optimize-accumulator-init, tritongpu-hoist-tmem-alloc{hoist-out-of-if=false}, tritongpu-promote-lhs-to-tmem, tritongpu-assign-latencies{num-stages=3}, tritongpu-schedule-loops, tritongpu-automatic-warp-specialization{num-stages=3}, tritongpu-pipeline{dump-intermediate-steps=false num-stages=3}, tritongpu-optimize-partition-warps, tritongpu-combine-tensor-select-and-if, tritongpu-hoist-tmem-alloc{hoist-out-of-if=true}, triton-nvidia-gpu-remove-tmem-tokens, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true}, triton-loop-aware-cse, tritongpu-prefetch, tritongpu-optimize-dot-operands{hoist-layout-conversion=true}, tritongpu-coalesce-async-copy, triton-nvidia-optimize-tmem-layouts, triton-nvidia-tma-lowering, tritongpu-remove-layout-conversions, triton-nvidia-interleave-tmem, tritongpu-reduce-data-duplication, tritongpu-reorder-instructions, triton-loop-aware-cse, symbol-dce, triton-nvidia-gpu-fence-insertion{compute-capability=103}, triton-nvidia-mma-lowering, sccp, cse, canonicalize{  max-iterations=10 max-num-rewrites=-1 region-simplify=normal test-convergence=false top-down=true})",
      disable_threading: true,
      verify_each: true
    }
  }
#-}
/workspace/scratch/v2.py:74:0: error: Failures have been detected while processing an MLIR pass pipeline
/workspace/scratch/v2.py:74:0: note: Pipeline failed while executing [`TritonGPUAutomaticWarpSpecialization` on 'builtin.module' operation, `NVWSInsertAref` on 'builtin.module' operation]: reproducer generated at `std::errs, please share the reproducer above with Triton project.`
[64, 64, 4, True, 2] ERR PassManager::run failed
